Neural Network Accelerator with Programmable Exponent Bias

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current deep learning technologies face challenges in achieving improvements in accuracy, performance, and energy efficiency, particularly in neural network training and inference processes.

Innovation Solution

The implementation of a deep learning accelerator system that utilizes an array of processing elements with compute and routing elements, enabling flow-based computations on wavelets, and incorporating features like programmable exponent bias for floating-point operations, stochastic rounding, data structure descriptors, fabric vectors, neuron smearing, and microthreading to enhance processing efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional deep learning processing is used, then implementation is simpler, but accuracy and energy efficiency are insufficient

Engineering Contradiction:
ImproveaccuracyVSAvoidprocessing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by introducing a programmable exponent bias mechanism that dynamically adjusts the exponent bias value for floating-point operations. This allows the system to optimize numerical precision and accuracy for different neural network workloads by changing the exponent bias parameter, thereby improving measurement precision without requiring fundamental changes to the processing architecture.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent segments the deep learning processing into distinct functional units including compute elements, routing elements, and specialized floating-point units with stochastic rounding capabilities. This segmentation allows each component to be optimized independently for its specific function, improving overall accuracy while managing complexity through modular design.

Inventive Principle:
Principle #1Segmentation

2Productivity

If conventional training methods are used, then process is simpler, but training time is longer

Engineering Contradiction:
Improvetraining speedVSAvoidtraining time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent implements continuous propagation through the neural network by maintaining persistent data structures and avoiding repeated memory accesses. The system keeps activation values and gradients in accessible memory states, enabling continuous computational flow without interruption, which significantly reduces training time while maintaining simple programming interfaces.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The patent performs preliminary actions by pre-computing and storing intermediate results in data structure descriptors and fabric vectors during the forward pass. These pre-computed values are readily available for the backward pass, eliminating the need to re-compute them and thereby reducing overall training time.

Inventive Principle:
Principle #10Preliminary action

3Speed

If conventional inference processing is used, then system is simpler, but inference latency is higher

Engineering Contradiction:
Improveinference speedVSAvoidinference latency
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent replaces conventional mechanical memory access patterns with a dataflow-based computational model where data moves continuously through processing elements. This substitution eliminates memory bottlenecks and enables parallel processing of inference operations, significantly reducing inference latency while maintaining system simplicity through hardware-level optimizations.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

4Use of energy by moving object

If standard floating-point operations are used, then compatibility is better, but energy efficiency is lower

Engineering Contradiction:
Improveenergy efficiencyVSAvoidfloating-point compatibility
Core Design Contradiction:
Use of energy by moving objectVSAdaptability or versatility

Solution Approach 1:

The patent applies local quality by implementing stochastic rounding in specific floating-point units where it is most beneficial for energy efficiency, while maintaining standard floating-point operations in other parts of the system. This localized application of custom rounding behavior optimizes energy consumption in critical paths while preserving compatibility and versatility in other operations.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the rounding parameter from deterministic to stochastic, which fundamentally alters the energy characteristics of floating-point operations. This parameter change enables more efficient hardware implementation by reducing the need for complex correction logic, thereby improving energy efficiency while maintaining IEEE 754 compatibility through controlled stochastic behavior.

Inventive Principle:
Principle #35Parameter changes

5Measurement precision

If detailed data tracking is implemented, then accuracy is improved, but computational overhead increases

Engineering Contradiction:
Improvecomputational accuracyVSAvoiddata structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges the data structure descriptors with the computational data flow, combining metadata about data characteristics directly with the data being processed. This merging eliminates the need for separate tracking structures, reducing computational overhead while maintaining detailed information about data precision, dimensions, and transformation requirements throughout the neural network computation.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11062202B2Numerical representation for neural networks
Publication Date: 2021.07.13 CEREBRAS SYSTEMS INC
  • US11062202B2 patent drawing
  • US11062202B2 patent drawing
  • US11062202B2 patent drawing

AI summary

Techniques in advanced deep learning provide improvements in one or more of accuracy, performance, and energy efficiency. An array of processing elements comprising a portion of a neural network accelerator performs flow-based computations on wavelets of data. Each processing element has a respective compute element and a respective routing element. Each compute element has a respective floating-point unit enabled to optionally and/or selectively perform floating-point operations in accordance with a programmable exponent bias and/or various floating-point computation variations. In some circumstances, the programmable exponent bias and/or the floating-point computation variations enable neural network processing with improved accuracy, decreased training time, decreased inference latency, and/or increased energy efficiency.