Neural Network Processor Algorithm Loading via DMA Segmentation
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Solution Overview
Problem
Processors experience inefficiencies when reading, loading, and executing operation instructions due to sequential processing, leading to longer times and reduced efficiency.
Innovation Solution
A method and apparatus that utilize a combination of a storage resource module and a direct memory access module to segment algorithm programs based on basic storage capacity, allowing for parallel loading and execution of algorithm subprograms, specifically in neural network processors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the processor reads, loads, and executes operation instructions sequentially, then the processing order is simple and easy to control, but the execution time is longer and efficiency is reduced
Solution Approach 1:
The algorithm program is segmented into multiple algorithm subprograms based on the basic storage capacity of the second storage resource. Each subprogram can be loaded and executed independently, enabling parallel processing between loading and execution phases, thereby reducing total execution time and improving productivity.
Solution Approach 2:
The master control program is loaded into the first storage resource and executed in advance to prepare the system. Additionally, algorithm subprograms are pre-segmented and ready for parallel loading during execution, allowing the processor to perform preliminary setup work before main execution begins.
2Productivity
If the algorithm program is segmented and processed in parallel, then the execution efficiency is improved, but the device complexity increases due to multiple storage resources and direct memory access module coordination
Solution Approach 1:
The first storage resource is designed to serve dual purposes: storing the master control program and potentially storing algorithm subprograms. The second storage resource similarly serves as both a storage medium and a processing target. This multi-functionality reduces the need for dedicated separate components, thereby managing complexity while enabling parallel processing.
Solution Approach 2:
The direct memory access module acts as an intermediary that automatically manages data transfer between storage resources and the processor without requiring complex control logic in the main processor. This mediator handles the complexity of coordination between multiple storage resources, allowing the processor to focus on execution rather than memory management.
3Speed
If sequential processing is used, then the device structure is simple, but the processing speed is slower
Solution Approach 1:
The system transitions from one-dimensional sequential processing to two-dimensional parallel processing by introducing multiple storage resources (first and second storage resources) that operate simultaneously. The processor can execute the master control program while the direct memory access module loads and executes algorithm subprograms in parallel, effectively adding a temporal dimension to the processing architecture.
Data Source
AI summary
An algorithm program loading method and a related apparatus are provided. The method includes: determining basic storage capacity of a second storage resource; obtaining an algorithm program, determining whether the algorithm capacity of the algorithm program is greater than the basic storage capacity, and if the algorithm capacity of the algorithm program is greater than the basic storage capacity, segmenting the algorithm program by taking the basic storage capacity as a unit to obtain algorithm subprograms; controlling a direct memory access module to load a master control program of a neural network processor to a first storage resource and executing the master control program; and controlling the direct memory access module to load the first algorithm subprogram in the algorithm subprograms to the second storage resource, confirming that the loading of the first algorithm subprogram is completed, executing the first algorithm subprogram, and loading in parallel a second algorithm subprogram.