Neural Network Code Generation for Resource-Constrained Devices
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Solution Overview
Problem
Existing neural architecture search (NAS) techniques fail to consider the resource constraints of target devices when designing neural networks, leading to inefficient execution due to the lack of consideration for tensor programs and resource support.
Innovation Solution
An electronic device generates optimized candidate neural networks and codes by considering the limitations of target devices, including processor type, memory, and power consumption, using a cost function that balances initialization time, execution time, and memory usage to ensure efficient execution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Extent of automation
If existing neural architecture search techniques are used to design neural networks, then neural network architectures can be automatically designed, but the resource constraints of target devices are not considered leading to inefficient execution
Solution Approach 1:
The patent changes the parameters considered in neural architecture search from only accuracy metrics to include device-specific resource constraints such as processor type, memory capacity, and power consumption limits. This allows the automatically designed neural networks to be optimized for both performance and efficient execution on target devices.
Solution Approach 2:
The patent performs preliminary analysis of target device characteristics and resource constraints before conducting the neural architecture search. By pre-processing device information and incorporating it into the search criteria, the system ensures that generated architectures are inherently optimized for the specific execution environment, avoiding later inefficiencies.
2Ease of manufacture
If tensor programs are not considered during neural network design, then the neural network can be designed independently, but the realization algorithm efficiency is compromised
Solution Approach 1:
The patent merges the neural network design process with the tensor program selection process. Instead of treating them as separate stages, the system jointly optimizes both the architecture and its realization algorithm by considering device-specific operation libraries and computational graph optimizations during the architecture search itself.
3Adaptability or versatility
If a single neural network is distributed to various target devices, then distribution is simplified, but resource consumption varies inefficiently across devices
Solution Approach 1:
The patent applies local quality by generating device-specific optimized versions of neural networks tailored to each target device's characteristics. Instead of using a uniform architecture across all devices, the system adapts the neural network structure, operations, and tensor programs to match the specific processor architecture, memory constraints, and power capabilities of each device type.
4Ease of manufacture
If standard neural architectures are only considered, then implementation is simplified, but non-standard architectures are excluded
Solution Approach 1:
The patent introduces dynamics into the architecture search by allowing the system to adaptively explore both standard and non-standard neural network structures based on device requirements. The search space is dynamically adjusted to include unconventional architectures when they prove beneficial for specific device optimizations, while maintaining the ability to fall back on proven standard architectures when appropriate.
Data Source
AI summary
An electronic device according to an embodiment includes: a memory storing one or more instructions; and a processor configured to execute the one or more instructions stored in the memory. The processor is configured to: receive information about a limitation, wherein the information about the limitation includes information about a target device for realizing a neural network; generate a plurality of candidate neural networks based on the information about the limitation; generate a plurality of codes for realizing the plurality of candidate neural networks in the target device, based on the information about the limitation and a pre-determined cost function; obtain performance index information corresponding to each of the plurality of codes; and provide the plurality of candidate neural networks and the plurality of codes corresponding to the plurality of candidate neural networks, respectively, based on the performance index information.