Neural Network Data Fetching Order Optimization
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Solution Overview
Problem
Neural processors face increased hardware area and power consumption costs due to the widening selection range of processors for data transfer, which compromises operation efficiency and flexibility.
Innovation Solution
A neural network operation apparatus that includes a buffer, a processor to change the fetching order of data based on an observation range and buffer size, and multiplexers to optimize data transfer, reducing the number of multiplexers and their size, thereby minimizing area and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the selection range of processors to which a single buffer may transfer data is widened, then the rate of operation and the flexibility of operation may increase, but the cost for hardware area and power consumption may greatly increase
Solution Approach 1:
The patent divides the data transfer path into multiple segments by introducing intermediate buffering and staged multiplexing. Instead of directly connecting a single buffer to multiple processors, data is transferred through intermediate buffers and processed in stages, reducing the complexity and area of individual multiplexers while maintaining overall system throughput.
Solution Approach 2:
The patent adds temporal dimension to data transfer by implementing multi-stage processing with intermediate buffering. Data flows through multiple time steps and buffering stages, transforming a spatial problem (direct buffer-to-processor connections) into a temporal solution (staged transfer through intermediate buffers), thereby reducing hardware area.
2Adaptability or versatility
If the selection range of processors to which a single buffer may transfer data is widened, then the flexibility of operation may increase, but the cost for hardware area and power consumption may greatly increase
Solution Approach 1:
The patent segments the data transfer operation into multiple stages with intermediate buffers, allowing flexible data routing through different paths and stages. This staged approach maintains operational flexibility while reducing the power consumption of individual multiplexers by limiting their selection range at each stage.
Solution Approach 2:
The patent implements dynamic data routing where the transfer path and timing can be adjusted based on operational requirements. The multi-stage buffering system allows flexible reconfiguration of data flow paths, maintaining adaptability while managing power consumption through controlled activation of different transfer stages.
3Adaptability or versatility
If the selection range of processors to which a single buffer may transfer data is widened, then the flexibility of operation may increase, but the cost for hardware area and power consumption may greatly increase
Solution Approach 1:
The patent divides the direct buffer-to-processor connection into multiple segmented stages with intermediate buffers. Each stage handles a limited subset of processor connections, reducing the area of individual multiplexers while collectively maintaining flexible access to all processors through the staged architecture.
Data Source
AI summary
A neural network operation apparatus includes: a buffer configured to store data for a neural network operation; a processor configured to change a fetching order of the data based on an observation range for fetching the data and a size of the buffer; and a first multiplexer configured to multiplex at least a portion of the data having the changed fetching order.