Neural Network Receiver for Closed-Eye High-Speed Data Links
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing high-speed signal links face challenges in maintaining accurate data transmission due to factors like jitter, noise, and crosstalk, which can close the eye diagram, leading to incorrect data recovery, and current equalization schemes are inadequate for further increases in data rates.
Innovation Solution
A neural network-based interpreter circuit that samples the data waveform at multiple timing points to determine bit values, eliminating the need for an open eye diagram and improving immunity to jitter and noise, thereby enabling higher data rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional equalization schemes (TXLE, CTLE, DFE) are used to improve the eye diagram, then data rate can be increased by some amount, but the system will fail when degrading factors are too severe or data rate is further increased
Solution Approach 1:
The patent replaces the traditional mechanical/electrical equalization system (TXLE, CTLE, DFE) with a neural network-based decision-making system. The neural network takes multiple waveform samples and timing information as input and directly outputs the decoded bit value, eliminating the need for conventional equalization mechanisms and enabling reliable operation even when the eye diagram is closed.
Solution Approach 2:
The patent changes the fundamental parameter used for decision-making from a single sampled voltage level (comparing to a reference) to multiple waveform characteristics including samples at different timing locations, delay circuit outputs, and neural network computed values. This multi-parameter approach allows accurate bit recovery even when traditional single-point sampling fails due to severe eye diagram closure.
2Device complexity
If a voltage comparator/slicer is used to determine bit values by comparing sampled voltage to reference voltage, then the mechanism is simple, but it requires the eye diagram to be open with sufficient margin
Solution Approach 1:
The patent introduces a neural network as an intermediary between the received waveform and the bit decision. Instead of directly comparing voltage to a reference threshold, the neural network processes multiple waveform features and timing information to compute the optimal decision, serving as a mediator that handles complex degradation scenarios without requiring simple comparator circuitry.
Solution Approach 2:
The patent transitions from one-dimensional decision-making (single voltage sample vs. reference threshold) to multi-dimensional decision-making by incorporating multiple timing locations, delay circuit outputs, and neural network computations. This dimensional expansion allows the system to resolve bit values even when the traditional one-dimensional approach fails due to eye diagram closure.
3Reliability
If multiple sampling points are used to improve bit value determination accuracy, then immunity to jitter and noise increases, but the device complexity increases
Solution Approach 1:
The patent merges multiple sampling functions and processing operations into a unified neural network circuit. Instead of implementing separate sampling circuits, comparators, and equalization stages, the neural network integrates these functions into a single computational unit that receives multiple inputs (waveform samples at different timing locations, delay circuit outputs) and produces the bit decision directly, reducing overall device complexity while maintaining high accuracy.
Data Source
Figure 1A
Figure 1B
Figure 1C
AI summary
Aspects of the embodiments are directed to a data transmission receiver that includes a neural network circuit for resolving a received bit value. The data transmission receiver can be coupled to a data transmitter by a high speed data link. The neural network circuit can sample a bit value at multiple locations across the bit's unit interval. The neural network circuit can also sample bit values for neighboring bits to the interested bit at multiple sampling locations across unit intervals for the neighboring bits. The neural network circuit can determine the value of the interested bit from the samples of the waveform.