Neural Network DVFS Control for Power and Timing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor devices face challenges in reducing power consumption while meeting execution time requirements for neural network models, particularly in high-performance processors like GPUs and NPUs.
Innovation Solution
A semiconductor system with a DVFS controller that includes an information collector, first and second work amount estimators, and an operating frequency determination module to dynamically adjust processor frequency based on neural network model data, optimizing power usage and execution time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the operating frequency of the processor is lowered to reduce power consumption, then power consumption is reduced, but execution time requirements for neural network models cannot be satisfied
Solution Approach 1:
The patent implements dynamic voltage frequency scaling (DVFS) that dynamically adjusts the operating frequency of the processor based on real-time workload analysis. The system transitions from static frequency operation to dynamic frequency adjustment, allowing the processor to operate at lower frequencies during low-workload periods to reduce power consumption, while automatically increasing frequency when execution time requirements demand it, thus resolving the contradiction between power savings and time constraints
Solution Approach 2:
The patent changes the operating parameter (frequency) of the processor based on estimated workload characteristics. By analyzing neural network model data and estimating required computation time, the system adjusts the frequency parameter to an optimal level that satisfies execution time requirements while minimizing power consumption, transforming the fixed parameter operation into a variable parameter approach that adapts to changing conditions
2Use of energy by moving object
If the operating frequency is dynamically adjusted to optimize power usage, then power consumption is reduced, but device complexity increases due to additional control modules
Solution Approach 1:
The DVFS controller is designed as a multi-functional module that performs multiple tasks: collecting neural network model data, estimating workload and execution time, determining optimal frequency levels, and coordinating with the processor. By consolidating these functions into a single controller unit, the patent reduces overall system complexity compared to having separate modules for each function, while still achieving dynamic power optimization
Solution Approach 2:
The system employs self-service mechanisms where the DVFS controller automatically analyzes workload characteristics and adjusts frequency without requiring external manual intervention. The controller uses built-in estimators that process neural network data and autonomously determine optimal operating parameters, reducing the need for complex external control systems and simplifying the overall device architecture
Data Source
AI summary
A semiconductor system is provided. The semiconductor system comprises a memory device storing a program for executing a DVFS controller, and a neural network processing unit using a neural network model, reading the program for executing the DVFS controller from the memory device and executing the read program, wherein the DVFS controller includes an information collector receiving data for each neural network model, a first work amount estimator estimating an execution time of a processing task of the processor and workload of the processor for each neural network model, and a second work amount estimator estimating a total workload required for the processor from the workload of the processor for each neural network model.