Neural Network Fault Detection via Selective Layer Duplication

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current fault detection methods in neural network processing are computationally intensive and costly, particularly in safety-critical systems, where they require full hardware duplication, which limits computational capacity and increases costs.

Innovation Solution

A method that schedules computations for neural network layers as either non-duplicated or duplicated operations, allowing for efficient fault detection by comparing outputs from duplicated computations, thereby reducing the need for full hardware duplication and enhancing computational efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If full hardware duplication is used for fault detection, then reliability is improved, but device complexity and computational burden increase

Engineering Contradiction:
Improvefault detection capabilityVSAvoidhardware duplication
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the neural network processing into different layers and identifies specific layers where fault detection is most critical. Instead of duplicating hardware for all layers, the invention applies fault detection mechanisms selectively to specific layers based on their importance and fault susceptibility, thereby reducing overall hardware complexity while maintaining reliability where it matters most.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements local quality by applying different fault detection strategies to different layers of the neural network. High-criticality layers receive duplicated computation and comparison-based fault detection, while lower-criticality layers use simpler or no fault detection mechanisms. This localized approach optimizes the balance between reliability and device complexity.

Inventive Principle:
Principle #3Local quality

2Reliability

If full hardware duplication is used for fault detection, then reliability is improved, but productivity decreases

Engineering Contradiction:
Improvefault detection capabilityVSAvoidcomputational efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent divides the neural network into multiple layers and applies fault detection selectively to specific segments (layers) rather than the entire network. This segmentation allows critical layers to have robust fault detection while non-critical layers maintain high computational efficiency, thus preserving overall productivity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial duplication of computations only where necessary for fault detection, rather than duplicating all computations. By performing duplicated computations partially (only for selected layers and operations), the system achieves adequate fault detection capability without the excessive computational burden of full duplication, thereby maintaining productivity.

Inventive Principle:
Principle #16Partial or excessive action

3Measurement precision

If duplicated computations are performed for fault detection, then measurement precision is improved, but use of energy increases

Engineering Contradiction:
Improveoutput verification accuracyVSAvoidcomputational energy consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent applies duplicated computations and comparison-based verification locally to specific layers and operations where fault detection is most beneficial, rather than uniformly across the entire neural network. This localized verification improves measurement precision for critical outputs while minimizing the additional energy consumption associated with duplicated computations.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20220365853A1Fault detection in neural networks
Publication Date: 2022.11.17 ARM LTD
  • US20220365853A1 patent drawing
  • US20220365853A1 patent drawing
  • US20220365853A1 patent drawing

AI summary

A method of performing fault detection during computations relating to a neural network comprising a first neural network layer and a second neural network layer in a data processing system, the method comprising: scheduling computations onto data processing resources for the execution of the first neural network layer and the second neural network layer, wherein the scheduling includes: for a given one of the first neural network layer and the second neural network layer, scheduling a respective given one of a first computation and a second computation as a non-duplicated computation, in which the given computation is at least initially scheduled to be performed only once during the execution of the given neural network layer; and for the other of the first and second neural network layers, scheduling the respective other of the first and second computations as a duplicated computation.