Neural Network Floating-Point Converter for Precision Power Trade-offs

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Solution Overview

Problem

Conventional general-purpose processors are inefficient in computing floating-point numbers, particularly in neural network applications where a single format may not suffice for varying levels of accuracy across different layers, leading to unnecessary power consumption.

Innovation Solution

A neural network processor with a floating-point number converter that adjusts the mantissa and exponent fields of process results to convert them into shortened floating-point numbers, using a pruning processor and exponent modifier to optimize bit lengths based on data categories and layers, thereby reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If floating-point number processors are implemented with high accuracy formats, then computation precision is improved, but power consumption increases

Engineering Contradiction:
Improvecomputation precisionVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic format switching that adapts the floating-point number format (precision and bit length) based on the specific computational requirements of different neural network layers and operations. This allows the system to use high-precision formats only when necessary and lower-precision formats otherwise, dynamically optimizing the trade-off between computation precision and power consumption throughout the neural network processing pipeline.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies different floating-point number formats to different parts of the neural network processing based on their specific requirements. Different layers, operations, or data types within the neural network can use different precision levels (e.g., full precision for weight updates, reduced precision for activation functions), allowing each local component to use the minimum necessary precision and thereby reducing overall power consumption while maintaining required accuracy.

Inventive Principle:
Principle #3Local quality

2Device complexity

If general-purpose processors use a single floating-point format, then device complexity is reduced, but adaptability to different neural network requirements deteriorates

Engineering Contradiction:
Improveprocessor configurationVSAvoidformat adaptability
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The processor incorporates dynamic format selection capability that allows it to switch between multiple floating-point formats (different precision levels and bit lengths) based on the computational requirements of different neural network layers and operations. This dynamic adaptability enables a single processor to handle diverse precision requirements without requiring separate dedicated hardware for each format.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent designs a universal floating-point number processing unit that can handle multiple floating-point formats (e.g., full precision, reduced precision, asymmetric formats) within a single processor architecture. This multi-functional capability allows the same hardware to efficiently process different types of neural network computations with varying precision requirements, eliminating the need for multiple specialized processors.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11797269B2Apparatus and methods for neural network operations supporting floating point numbers of short bit length
Publication Date: 2023.10.24 CAMBRICON TECH CO LTD
  • US11797269B2 patent drawing
  • US11797269B2 patent drawing
  • US11797269B2 patent drawing

AI summary

Aspects for neural network operations with floating-point number of short bit length are described herein. The aspects may include a neural network processor configured to process one or more floating-point numbers to generate one or more process results. Further, the aspects may include a floating-point number converter configured to convert the one or more process results in accordance with at least one format of shortened floating-point numbers. The floating-point number converter may include a pruning processor configured to adjust a length of a mantissa field of the process results and an exponent modifier configured to adjust a length of an exponent field of the process results in accordance with the at least one format.