Neural Network Generating Device for Embedded Image Recognition

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Solution Overview

Problem

Convolutional neural networks (CNNs) used in image recognition face challenges in efficiently running on embedded devices like IoT devices due to limited hardware resources, requiring a method to generate neural networks that can operate with high performance on these devices.

Innovation Solution

A neural network generating device and method that acquires hardware and network information to generate a neural network execution model, incorporating a learning unit to optimize parameters for efficient operation on embedded devices, including convolution and quantization operations optimized for low-bit weights and data formats.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If convolutional neural networks are used for image recognition on embedded devices, then recognition performance can be achieved, but hardware resources and power consumption are excessively consumed

Engineering Contradiction:

Improveimage recognition performanceVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies parameter changes by converting neural network weights and data from high-precision formats (32-bit floating point) to low-precision formats (8-bit integers or lower). This parameter transformation reduces the computational burden and memory bandwidth requirements while maintaining sufficient recognition accuracy for embedded device applications

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent segments the neural network computation into distinct operations (convolution, activation, pooling) and processes them separately with optimized data formats at each stage. This segmentation allows for targeted optimization of each operation type, reducing overall power consumption while maintaining recognition performance

Inventive Principle:

Principle #1Segmentation

2Reliability

If convolutional neural networks are deployed on embedded devices, then image recognition functionality is provided, but the complexity of hardware resources increases

Engineering Contradiction:

Improveimage recognition functionalityVSAvoidhardware resources

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent reduces device complexity by changing the numerical precision parameters of neural network operations from 32-bit floating point to 8-bit or lower precision integers. This parameter change simplifies the hardware requirements for arithmetic units, memory interfaces, and data transfer mechanisms while preserving adequate recognition functionality

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent employs simplified, lower-precision computational objects (low-bit weights and activations) that require less sophisticated hardware to process. These simplified data representations can be handled by simpler, less resource-intensive hardware components, reducing overall device complexity

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

3Measurement precision

If standard neural network operations are performed, then computation accuracy is maintained, but the speed of operation is slow

Engineering Contradiction:

Improvecomputation accuracyVSAvoidoperation speed

Core Design Contradiction:

Measurement precisionVSSpeed

Solution Approach 1:

The patent changes the data representation parameter from high-precision floating point to low-precision integer formats, which enables faster computation through simplified arithmetic operations. The low-precision format maintains sufficient accuracy for the application while dramatically improving operation speed on embedded hardware

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent substitutes complex floating-point arithmetic mechanisms with simpler integer arithmetic mechanisms. This substitution replaces resource-intensive floating-point unit operations with faster, more efficient integer arithmetic operations that are better suited for embedded device architectures

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

4Measurement precision

If high-precision data formats are used, then computation accuracy is improved, but memory access and power consumption increase

Engineering Contradiction:

Improvecomputation accuracyVSAvoidmemory access energy

Core Design Contradiction:

Measurement precisionVSLoss of energy

Solution Approach 1:

The patent changes the precision parameter of data storage from 32-bit floating point to 8-bit or lower precision integer formats. This parameter change reduces the memory bandwidth required for data access, thereby reducing the energy consumed during memory operations while maintaining adequate computational accuracy for the application

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS20230316071A1Neural network generating device, neural network generating method, and neural network generating program

Publication Date: 2023.10.05 MAXELL LTD

AI summary

This neural network generating device for generating a neural network execution model for computing a neural network is provided with: an execution model generating unit for generating the neural network execution model on the basis of hardware information relating to hardware on which the neural network execution model operates, and network information relating to the neural network; and a learning unit for generating trained parameters of the generated neural network execution model.