Neural Network Classification for Semiconductor Layout Data Selection

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Solution Overview

Problem

Designing a layout for a semiconductor integrated circuit using EDA tools typically requires significant computational resources and time, and selecting appropriate layout data as an initial value for the warm start method is challenging, especially when hardware structure information is not pre-designed.

Innovation Solution

A classification engine training method that involves obtaining base design data for different hardware structure information items, generating a training dataset with additional design data items that include partial base design data, and training a neural network to infer major ID values for these additional design data items, facilitating the selection of suitable initial layout data for the warm start method.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If layout design is automated using EDA tools, then design productivity is improved, but computational resources and time consumption increase

Engineering Contradiction:
Improvelayout design automationVSAvoidcomputational time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-processing hardware structure information into graph objects and pre-training a neural network classification engine before actual layout design. This preprocessing creates ready-to-use trained models that can quickly classify new hardware structures, avoiding the need to process from scratch during each design iteration, thus reducing computational time while maintaining automation benefits

Inventive Principle:
Principle #10Preliminary action

2Loss of energy

If warm start method is used with pre-designed layout data, then computational resources are reduced, but selection difficulty increases when hardware structure information is not pre-designed

Engineering Contradiction:
Improvecomputational resourcesVSAvoidinitial value selection
Core Design Contradiction:
Loss of energyVSEase of operation

Solution Approach 1:

The patent implements self-service by enabling the classification engine to automatically select appropriate initial layout data without human intervention. The trained neural network autonomously classifies hardware structure information and identifies suitable warm start candidates, making the system self-sufficient in selecting initial values even when hardware structure information is not pre-designed, thus reducing both computational resources and selection complexity

Inventive Principle:
Principle #25Self-service

3Ease of manufacture

If inappropriate layout data is used as initial value, then design quality deteriorates

Engineering Contradiction:
Improvedesign qualityVSAvoidinitial value suitability
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent applies feedback by using the classification engine to evaluate and select initial layout data based on the specific characteristics of the hardware structure information. The trained neural network provides feedback on the suitability of potential initial values, ensuring that only appropriate layout data is selected for each specific design case, thereby maintaining high design quality while adapting to different hardware structures

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250200364A1Classification engine training method for semiconductor integrated circuit, classification method for semiconductor integrated circuit, and design method for semiconductor integrated circuit
Publication Date: 2025.06.19 SOCIONEXT INC
  • US20250200364A1 patent drawing
  • US20250200364A1 patent drawing
  • US20250200364A1 patent drawing

AI summary

A classification engine training method for a semiconductor integrated circuit includes: obtaining a base design data item corresponding to each of one or more hardware structure information items; generating a plurality of additional design data items; and training a neural network using each of the plurality of additional design data items as an input. The plurality of additional design data items each include a partial base design data item that is a portion of the base design data item. One major ID value is assigned to each of the one or more hardware structure information items. In the training, the neural network is trained using each of the plurality of additional design data items as the input, to infer one major ID value corresponding to the additional design data item to be used as the input.