Neural Network Mapping Two-Stage Balancing for Chip Utilization

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Solution Overview

Problem

Existing neural network mapping methods face challenges in balancing resource distribution and achieving high utilization rates due to unbalanced phases and MACs across processing elements in chips, leading to inefficiencies and resource waste under strong synchronization conditions.

Innovation Solution

A two-stage balancing method is introduced, where the first stage balances the number of phases and the second stage balances MACs, using a preset balancing vector to optimize the global utilization rate by adjusting the number of phases and MACs across processing elements, ensuring that the balancing process does not worsen the global utilization rate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If neural network calculation tasks are mapped to processing elements without phase balancing, then mapping simplicity is maintained, but resource utilization rate deteriorates due to unbalanced phases and MACs across processing elements

Engineering Contradiction:
Improveresource utilization rateVSAvoidmapping complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the neural network calculation tasks into distinct phases and MAC operations, allowing independent balancing of each component. The two-stage balancing process separately optimizes phase distribution and MAC distribution across processing elements, enabling fine-grained control over resource allocation to improve overall utilization rate.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces dynamic balancing mechanisms that adjust the number of phases and MACs assigned to each processing element based on actual computational needs. The balancing process dynamically redistributes tasks to achieve optimal resource utilization while adapting to different neural network architectures and hardware configurations.

Inventive Principle:
Principle #15Dynamics

2Reliability

If strong synchronization is implemented across processing elements, then execution reliability is improved, but resource waste increases due to inability to optimize phase distribution

Engineering Contradiction:
Improveexecution reliabilityVSAvoidresource waste
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent performs preliminary balancing of phases and MACs before executing the neural network computation on the hardware. By pre-optimizing the task distribution and phase allocation according to the synchronization constraints, the system achieves both reliable execution and efficient resource utilization without needing to compromise between the two objectives during runtime.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the distribution parameters of phases and MACs across processing elements to optimize resource allocation under strong synchronization constraints. By adjusting these parameters through the two-stage balancing process, the system achieves optimal performance while maintaining synchronization reliability.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If unbalanced resource distribution is present in neural network algorithms, then algorithm flexibility is maintained, but load balancing performance deteriorates

Engineering Contradiction:
Improveload balancing performanceVSAvoidalgorithm flexibility
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent applies partial balancing actions focused on the most critical imbalances in phase and MAC distribution. Rather than attempting to perfectly balance all resources, the system identifies and addresses the most significant imbalances that cause resource waste, achieving substantial improvement in load balancing performance while maintaining algorithm flexibility.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11769044B2Neural network mapping method and apparatus
Publication Date: 2023.09.26 LYNXI TECH CO LTD
  • US11769044B2 patent drawing
  • US11769044B2 patent drawing
  • US11769044B2 patent drawing

AI summary

A neural network mapping method and a neural network mapping apparatus are provided. The method includes: mapping a calculation task for a preset feature map of each network layer in a plurality of network layers in a convolutional neural network to at least one processing element of a chip; acquiring the number of phases needed by a plurality of processing elements in the chip for completing the calculation tasks, and performing a first stage of balancing on the number of phases of the plurality of processing elements; and based on the number of the phases of the plurality of processing elements obtained after the first stage of balancing, mapping the calculation task for the preset feature map of each network layer in the plurality of network layers in the convolutional neural network to at least one processing element of the chip subjected to the first stage of balancing.