Neural Network Mask Synthesis for ICs

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The existing mask synthesis processes for integrated circuits are computationally expensive and slow due to the need for optical proximity correction (OPC) and other compensation schemes, which are inefficient with shrinking chip dimensions and increasing circuit complexity.

Innovation Solution

A neural network-based system that generates mask design polygons by determining offset distances from the edges of circuit design polygons, allowing for efficient mask synthesis without the need for pixel-based representations or computationally intensive data transformations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If traditional optical proximity correction (OPC) methods are used for mask synthesis, then manufacturing precision is improved, but computational cost and processing time increase significantly

Engineering Contradiction:
Improvepattern transfer accuracyVSAvoiddesign process speed
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent transforms the mask synthesis problem from a complex iterative OPC process into a direct regression problem by changing the parameter representation. Instead of adjusting multiple pattern parameters through iterative optimization, the system uses a neural network to directly predict offset distances from input features, fundamentally changing the computational approach from iterative optimization to direct prediction.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the traditional mechanical/optical iterative OPC adjustment process with a neural network-based prediction system. The neural network learns the complex relationship between input features and required offset distances, substituting the iterative mechanical adjustment process with a learned mathematical model that provides both speed and accuracy.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Measurement precision

If pixel-based representations are used for mask synthesis, then pattern detail is improved, but computational resources and processing time increase

Engineering Contradiction:
Improvepattern detail resolutionVSAvoidcomputational resources
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent segments the mask synthesis problem into local feature extraction and global pattern reconstruction. Instead of processing the entire pattern as a single pixel grid, the system extracts local features (edge distances, widths, spaces) at specific locations and uses a neural network to predict offset distances for each location, then reconstructs the final pattern from these localized predictions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a 2D pixel-based representation to a feature-space representation that captures essential geometric information in a compressed form. By representing patterns through extracted features (distances, widths, spaces) rather than pixel grids, the system reduces computational dimensionality while preserving the critical information needed for accurate mask synthesis.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12293279B2Neural network based mask synthesis for integrated circuits
Publication Date: 2025.05.06 SYNOPSYS INC
  • US12293279B2 patent drawing
  • US12293279B2 patent drawing
  • US12293279B2 patent drawing

AI summary

A system uses machine learning models, such as neural networks for generating mask design from a circuit design. The machine learning models have inputs and outputs which are localized to a small region of the circuit design. The machine learning model takes as input features describing the circuit design in the neighborhood of a location and generates an offset distance as output. The system uses the offset distance to generate features of the mask design, for example, main features or assist features corresponding to a circuit design polygon. The system may use the offset distance for target optimization by modifying the circuit design polygon to obtain a circuit design polygon that has improved manufacturability.