Neural Network Memory Fault Mitigation via Bit Replacement

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Solution Overview

Problem

Neural networks face significant accuracy issues in image recognition due to faults or damages in memory storage, particularly in higher bits, leading to low success rates in image recognition tasks.

Innovation Solution

A data processing circuit and fault mitigating method that determine the repair condition based on the difference between the output of computing layers and correct values, replacing fault bits with non-fault bits from corresponding positions in memory to improve recognition success rates across various neural network models.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory is used to store neural network data, then data storage capacity is provided, but fault/damage in memory blocks causes loss of data completeness and accuracy

Engineering Contradiction:
Improvedata storage capacityVSAvoiddata completeness and accuracy
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent performs fault simulation and identifies fault bits before actual neural network execution. By pre-determining which bits are faulty and establishing repair conditions in advance, the system prepares compensation strategies beforehand, ensuring data accuracy is maintained during runtime without requiring real-time fault detection.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the parameter of bit value by replacing fault bit values with corresponding non-fault bit values based on determined repair conditions. This parameter substitution restores data accuracy by correcting erroneous bit values while preserving the overall data structure and storage capacity.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If fault bits are replaced with non-fault bits, then data accuracy is improved, but additional processing steps are required

Engineering Contradiction:
Improvedata accuracyVSAvoidprocessing steps
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The repair conditions mapping between fault bits and non-fault bits is determined in advance through fault simulation, before actual data processing. This preliminary preparation stores the replacement strategy in a lookup table or mapping structure, so that during runtime, the system only needs to perform simple value substitution based on pre-computed repair conditions, minimizing additional processing complexity.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11978526B2Data processing circuit and fault mitigating method
Publication Date: 2024.05.07 SKYMIZER TAIWAN INC
  • US11978526B2 patent drawing
  • US11978526B2 patent drawing
  • US11978526B2 patent drawing

AI summary

A data processing circuit and a fault mitigating method are provided. The method is adapted for a memory having at least one fault bit. The memory provides a block for data storage. A difference between an output of a value of a plurality of bits input to at least one computing layer in a neural network and a correct value is determined. The bits are respectively considered the at least one fault bit. A repair condition is determined based on the difference. The repair condition includes a correspondence between a position where the fault bit is located in the block and at least one non-fault bit in the memory. A value of at least one non-fault bit of the memory replaces a value of the fault bit based on the repair condition.