Neural Network Partitioning Axes for Deterministic Parallel Computing

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Solution Overview

Problem

Neural networks processing can be slow or infeasible in all devices due to inefficient and non-deterministic parallel computation schemes.

Innovation Solution

A method for determining a parallel computation scheme for neural networks involves transforming a computation graph into a recursive dataflow graph, selecting partitioning axes for tensors based on communication costs, and dividing tensors into subtensors for parallel processing by multiple computing devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Extent of automation

If neural networks are processed on all devices, then automation capability is improved, but processing speed deteriorates due to inefficient parallel computation schemes

Engineering Contradiction:
Improveautomation capabilityVSAvoidprocessing speed
Core Design Contradiction:
Extent of automationVSSpeed

Solution Approach 1:

The computation graph is segmented into operator nodes and tensors that can be independently processed. Each operator node represents a discrete computational unit, and tensors are divided into subtensors along partitioning axes, enabling parallel processing across multiple devices while maintaining automation capability

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a new dimension of parallelism by creating recursive dataflow graphs that operate across multiple computational dimensions. This allows the system to process neural networks in parallel across devices, layers, and operations simultaneously, transforming sequential processing into multi-dimensional parallel execution

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If parallel computation is implemented without deterministic schemes, then processing capability is improved, but reliability deteriorates due to non-deterministic behavior

Engineering Contradiction:
Improveprocessing capabilityVSAvoiddeterminism
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system performs preliminary actions by determining partitioning schemes and processing orders before actual computation begins. The recursive dataflow graph structure pre-defines how computations will be distributed and ordered, ensuring deterministic behavior while enabling parallel processing capability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent incorporates feedback mechanisms through cost determination and processing order optimization. The system evaluates computational costs and communication requirements, then adjusts partitioning strategies to achieve both high productivity and deterministic outcomes through iterative optimization

Inventive Principle:
Principle #23Feedback

3Productivity

If tensors are divided into subtensors for parallel processing, then productivity is improved, but communication overhead increases

Engineering Contradiction:
Improveparallel processing efficiencyVSAvoidcommunication overhead
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent applies local quality by determining communication costs specific to each operator node and tensor partitioning decision. Instead of uniform partitioning, the system optimizes subtensor distribution based on local communication requirements, placing computationally intensive operations with high communication needs strategically to minimize overall overhead

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system dynamically changes partitioning parameters such as partitioning axes and subtensor dimensions based on communication cost analysis. By adjusting these parameters according to operator-specific requirements, the system achieves high parallel productivity while minimizing communication overhead through optimized data distribution

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP4115342B1Parallel computing scheme generation for neural networks
Publication Date: 2026.02.25 HUAWEI TECH CO LTD
  • EP4115342B1 patent drawingFigure 1~3
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  • EP4115342B1 patent drawingFigure 7~8

AI summary

Various embodiments relate to determining a parallel computation scheme for a neural network. A device may receive a computation graph and transform the computation graph into a dataflow graph comprising recursive subgraphs. Each recursive subgraph may comprise a tuple of another recursive subgraph and an operator node, or an empty graph. The device may determine a number of partitioning recursions based on a number of parallel computing devices. For each partitioning recursion, the device may determine costs corresponding to operator nodes, determine a processing order of the recursive subgraphs, and process the recursive subgraphs. To process a recursive subgraph, the device may select a partitioning axis for tensor(s) associated with an operator node of the recursive subgraph. The device may output a partitioning scheme comprising partitioning axes for each tensor associated with the operator nodes. Devices, methods, and computer programs are disclosed.