Multi-Core Neural Network Synchronization via Segmented Status Tracking

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Solution Overview

Problem

Current methods for synchronizing the execution of neural networks across multiple processing cores are limited to maintaining a single synchronization status for each core, leading to dead-lock conditions where some cores are stuck waiting for others to finish executing previous layers.

Innovation Solution

The proposed system uses multiple synchronization statuses for each processing core to ensure that each core has completed executing a previous layer before starting the next layer, avoiding dead-lock conditions by allowing cores to proceed once they have access to necessary input data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single synchronization status is maintained for each processing core, then the synchronization mechanism is simple, but dead-lock conditions occur where cores are stuck waiting for others to finish executing previous layers

Engineering Contradiction:
Improvesynchronization mechanism complexityVSAvoidexecution synchronization reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent segments the single synchronization status into multiple synchronization statuses for each processing core. Each core maintains separate status indicators to track different synchronization states (e.g., whether it has finished executing a layer, whether other cores are ready), which eliminates deadlocks by allowing cores to proceed independently when conditions permit, while still maintaining overall synchronization through these segmented status checks.

Inventive Principle:
Principle #1Segmentation

2Productivity

If multiple synchronization statuses are maintained for each processing core, then dead-lock conditions are avoided and execution efficiency improves, but the complexity of the synchronization mechanism increases

Engineering Contradiction:
Improveneural network execution efficiencyVSAvoidsynchronization mechanism complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements feedback mechanisms where each processing core continuously monitors the synchronization statuses of other cores and adjusts its own execution accordingly. When a core finishes executing a layer, it updates its status, and other cores detect this change and can proceed when ready. This feedback loop ensures efficient coordination without deadlocks, with each core actively managing its state based on real-time status information from peers.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250190746A1Synchronized execution of neural network layers in multi-core environments
Publication Date: 2025.06.12 TEXAS INSTRUMENTS INC
  • US20250190746A1 patent drawing
  • US20250190746A1 patent drawing
  • US20250190746A1 patent drawing

AI summary

Disclosed herein are systems and methods for executing a neural network (NN) across multiple processing cores. In an example embodiment, a system includes processing circuitry comprising a first processing core and a second processing core, such that the second processing core is coupled to the first processing core. Prior to executing a current layer of the NN, the second processing core determines a synchronization status of the first processing core with respect to a previous layer of the NN. Next, the second processing core executes the current layer of the NN based on data computed by the first and second processing cores with respect to the previous layer of the NN. Upon executing the current layer of the NN, the second processing core updates the first processing core with a synchronization status of the second processing core with respect to the current layer of the NN.