Neural Network Arithmetic Apparatus Using Time-Delay Conversion
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Solution Overview
Problem
Conventional devices optimized for single precision floating point arithmetic, such as CPUs, GPUs, and DSPs, limit the advantages of high-speed calculation and low power consumption when reducing data bits for Deep Learning processes.
Innovation Solution
An arithmetic apparatus for neural networks incorporating digital-time conversion circuits that delay input time signals by variable and fixed amounts, and a time-digital conversion circuit to generate digital output signals, allowing for high-speed and low-power Deep Learning operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional devices (CPU, GPU, DSP) optimized for single precision floating point arithmetic are used, then calculation accuracy is maintained, but high-speed calculation and low power consumption advantages are limited
Solution Approach 1:
The patent replaces conventional floating-point arithmetic mechanisms with integer arithmetic and time-delay based computation. By using delay elements instead of traditional floating-point units, the system achieves higher speed and lower power consumption while maintaining sufficient accuracy for neural network operations through the relationship: delay time represents weight values, and pulse timing represents input signals.
Solution Approach 2:
The patent changes the fundamental parameters of computation from floating-point numbers to time delays and integer counts. Weight values are represented by delay times rather than floating-point numbers, and multiplication operations are performed by counting pulses over delayed time periods, transforming the computational paradigm to achieve better performance characteristics.
2Use of energy by moving object
If data bits are reduced for high-speed calculation and low power consumption, then energy efficiency improves, but device performance degrades when using conventional architectures
Solution Approach 1:
The patent substitutes floating-point arithmetic with a time-based integer arithmetic system that uses delay elements and pulse counters. This substitution allows the system to operate with reduced data precision (integer counts rather than floating-point) while maintaining calculation reliability through the physical timing relationships that inherently preserve computational accuracy.
3Measurement precision
If conventional floating point arithmetic units are used, then calculation precision is maintained, but hardware complexity and circuit area increase
Solution Approach 1:
The patent replaces complex floating-point arithmetic units with simple delay elements, pulse generators, and counters. The computational precision is maintained through the timing relationships and pulse counting mechanisms rather than through floating-point representation, significantly simplifying the hardware configuration and reducing circuit area.
Solution Approach 2:
The patent extracts only the essential computational functions needed for neural networks (multiplication and accumulation) and implements them using simple delay and counting mechanisms, removing the unnecessary complexity of full floating-point arithmetic units while retaining sufficient precision for the application.
Data Source
AI summary
An arithmetic apparatus used for a neural network includes a plurality of digital-time conversion circuits connected in series and a time-digital conversion circuit connected to a last digital-time conversion circuit in the series. Each of the digital-time conversion circuits is configured to delay a first input time signal by a variable amount, delay a second input time signal by a fixed amount, and output the delayed first and second input time signals respectively as either first and second output time signals or second and first output time signals, in accordance with the input data. The time-digital conversion circuit is configured to generate a digital output signal by comparing first and second output time signals from the last digital-time conversion circuit.