Neural Network Unit Multiplexer Configuration for Parallel Processing
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Solution Overview
Problem
Current hardware processing units face inefficiencies in performing computations associated with artificial neural networks (ANNs), particularly in deep learning applications such as speech and image recognition, due to limitations in general-purpose processor computation power and performance.
Innovation Solution
A hardware processing unit and neural network unit are designed with an accumulator, multiplier-adder, and multiplexers to efficiently perform multiply-accumulate operations, allowing for a large array of processing units to operate in parallel, thereby enhancing the computation efficiency for ANNs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If general-purpose processor computation power is increased, then neural network computation performance is improved, but hardware complexity and cost increase
Solution Approach 1:
The system divides the neural network processing into specialized hardware components: multipliers for weight multiplication, accumulators for summing products, and memory units for storing weights and inputs. This segmentation allows each component to be optimized for its specific function, achieving high neural network computation performance without requiring a single complex general-purpose processor.
Solution Approach 2:
The patent implements an array of multiple identical neural network units that can operate in parallel. Each unit contains the same structure of multipliers, accumulators, and memory units, allowing the system to handle large-scale neural network computations by simply increasing the number of copies rather than designing a more complex single unit.
2Productivity
If the number of neural network units in array is increased, then computation capacity is improved, but resource utilization and hardware resources increase
Solution Approach 1:
Each neural network unit is segmented into functional blocks (multiplier, accumulator, memory units) that can be independently instantiated. This allows the system to achieve high computation capacity by replicating these standardized segments rather than creating a monolithic complex system.
Solution Approach 2:
The neural network units are designed as universal, interchangeable modules that can perform the same computation capacity function. Each unit is multi-functional, handling weight multiplication, accumulation, and memory access operations, which reduces the need for specialized hardware for each function and optimizes resource utilization.
Data Source
AI summary
A hardware processing unit is provided. The hardware processing unit includes: an accumulator; a multiplier-adder receives first and second factors and receives an addend, the multiplier-adder generates a sum of the addend and a product of the first and second factors and provides the sum; a first multiplexer receives a first operand, a positive one, and a negative one and selects one of them for provision as the first factor to the multiplier-adder; a second multiplexer receives a second operand, a positive one, and a negative one and selects one of them for provision as the second factor to the multiplier-adder; a third multiplexer, having an output, that receives the first operand and the second operand and selects one of them for provision on its output; and a fourth multiplexer receives the third multiplexer output and the sum and selects one of them for provision to the accumulator.