Dual-Sided Neural Probe Electrode Layout With TSV Signal Routing

The patent applies preliminary action by forming the electronic circuitry on the substrate before forming the arrays of electrodes on both surfaces. This sequence ensures that when plasma etching is used to create the electrodes, the sensitive electronic circuitry is already in place and protected, eliminating the risk of plasma-induced damage that would occur if electrodes were formed first and then connected to circuitry.

The patent segments the manufacturing process into distinct stages: first forming the electronic circuitry on the substrate, then forming through-substrate vias to connect to electrodes on both surfaces. This segmentation allows each component to be manufactured and protected independently, with the circuitry established before exposure to plasma processing steps.

The patent merges the electronic circuitry directly with the substrate that also carries the electrode arrays. By integrating the circuitry onto the same substrate as the electrodes rather than using separate components, the design achieves compact signal processing close to the electrodes while avoiding the complexity of additional external processing modules or layers.

The patent utilizes the third dimension by routing connections through the substrate thickness via through-substrate vias. This allows electronic circuitry to be positioned on one surface while electrodes are accessed from both surfaces, enabling compact three-dimensional integration that reduces overall device complexity compared to planar arrangements.