Neural Processor Circuit Secure Mode Switching
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Solution Overview
Problem
Current neural network processing systems rely heavily on central processing units (CPUs), leading to significant bandwidth consumption and increased power usage due to the resource-intensive nature of neural network operations.
Innovation Solution
A neural processor circuit with a security controller that switches between non-secure and secure modes, utilizing separate data sources for processing, allowing for efficient operation and secure data handling by isolating secure tasks from non-secure tasks and reducing CPU load.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a CPU is used to perform neural network operations, then the system is easy to configure and instantiate different machine learning models, but the bandwidth consumption and power consumption increase significantly
Solution Approach 1:
The system is divided into two distinct processing paths: a CPU path for non-secure tasks and a neural processing unit (NPU) path for secure neural network operations. The NPU is further segmented into dedicated functional units including convolution engines, activation function units, and pooling units, each handling specific operations independently from the CPU to reduce overall system power consumption while maintaining configurability through separate control interfaces.
Solution Approach 2:
A security controller acts as an intermediary between the CPU and the neural processing unit, managing mode switching and data flow. The controller includes a mode register that mediates between secure and non-secure operations, and a data processor that intermediates data transfer between system memory and the NPU, enabling the CPU to offload neural network tasks without direct involvement in the actual computation.
2Use of energy by moving object
If a neural processing unit is introduced to reduce CPU load, then power consumption decreases, but the device complexity increases
Solution Approach 1:
The neural processing unit is designed as a universal processor capable of performing multiple neural network operations including convolution, activation functions, pooling, and fully connected layer operations. The convolution engine can handle different kernel sizes and strides, while activation function units support various non-linear transformations, allowing a single NPU structure to replace multiple specialized circuits and reduce overall device complexity.
Solution Approach 2:
Multiple neural network processing functions are merged into a single integrated neural processing unit that combines convolution engines, activation function units, pooling units, and output processing circuits. The security controller merges CPU management with NPU coordination functions, and the data processor combines memory interface and data routing capabilities, reducing the number of separate components needed in the system.
3Reliability
If secure mode switching is implemented to protect data, then security is enhanced, but the operation complexity increases
Solution Approach 1:
The system implements dynamic mode switching between secure and non-secure states through a mode register in the security controller. The neural processing unit can dynamically transition between processing secure neural network data from trusted memory zones and handling non-secure data from untrusted zones, with the controller adapting its data routing and access permissions based on the current security state without requiring separate hardware for each mode.
Solution Approach 2:
The security controller changes operational parameters including memory access permissions, data routing paths, and processor state based on the security mode. The mode register serves as a parameter that controls whether the NPU accesses trusted or untrusted memory zones, and whether the CPU can interface with the NPU, simplifying security management through parameter-based control rather than structural complexity.
Data Source
AI summary
Embodiments relate to switching a neural processor circuit between non-secure and secure modes. A security controller of the neural processor circuit indicates that a transition from the non-secure mode to the secure mode is to occur. The security controller waits for a neural task manager of the neural processor circuit to clear out any existing non-secure tasks in queues. After the existing non-secure mode tasks are cleared, the security controller switches the neural processor circuit to the secure mode. While in the secure mode, secure tasks are added to one or more queues and executed, and data for processing in the neural processor circuit is received from a secure source. The neural processor circuit may to transition back to the non-secure mode when all secure mode tasks are completed.