Neural Network Semiconductor Circuit for Low-Power Product-Sum Operation
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Solution Overview
Problem
As the complexity and size of artificial neural networks increase, so does power consumption and heat generation, which can negatively impact the performance and reliability of circuit elements, particularly in hierarchical neural networks where the number of circuits and connections grows exponentially, leading to significant thermal challenges.
Innovation Solution
A semiconductor device is designed with a hierarchical artificial neural network architecture that incorporates specific circuit configurations, including transistors and capacitors, to manage power consumption and thermal effects by optimizing signal transmission and processing through controlled current output based on input potentials, thereby reducing the impact of environmental temperature.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of circuits and connections in the artificial neural network is increased to improve processing capability, then the computational power and neural network complexity are improved, but power consumption and heat generation increase significantly
Solution Approach 1:
The patent divides the neural network into multiple layers (input layer, hidden layers, output layer) with distinct functional units. Each layer processes signals independently, allowing power management at the layer level and reducing overall power consumption while maintaining computational capability.
Solution Approach 2:
The patent employs transistors with different threshold voltages (first threshold voltage and second threshold voltage) to optimize power consumption. By changing the electrical parameters of the transistors, the device achieves low power operation while maintaining the required computational functionality for neural network processing.
2Productivity
If the number of circuits and connections in the artificial neural network is increased to improve processing capability, then the computational power and neural network complexity are improved, but heat generation increases and affects circuit element characteristics
Solution Approach 1:
The patent uses transistors with different threshold voltages to reduce power consumption and consequently reduce heat generation. By optimizing the electrical parameters of the circuit elements, the device maintains computational power while minimizing thermal effects that could degrade performance.
Solution Approach 2:
The patent employs a circuit configuration that uses simple, readily manufacturable components (transistors and capacitors) that can be easily replaced or reset. This approach allows for efficient heat management by enabling quick reset operations without requiring complex cooling infrastructure.
3Use of energy by moving object
If transistors with different threshold voltages are used to reduce power consumption, then power efficiency is improved, but circuit design complexity increases
Solution Approach 1:
The patent combines transistors with different threshold voltages into integrated circuit units where the first transistor and second transistor work together in a coordinated manner. This merging approach allows the complex functionality to be achieved through compact, standardized circuit blocks that can be replicated across the neural network architecture.
Solution Approach 2:
The patent creates universal circuit units that can perform multiple functions (signal processing, power management, threshold control) using a standardized configuration of transistors with different threshold voltages. This universality simplifies the overall design by allowing the same circuit block to be reused throughout the neural network.
Data Source
AI summary
A semiconductor device that can perform product-sum operation with low power consumption is provided. The semiconductor device includes first and second circuits; the first circuit includes a first holding node and the second circuit includes a second holding node. The first circuit is electrically connected to first and second input wirings and first and second wirings, the second circuit is electrically connected to the first and second input wirings and the first and second wirings, and the first and second circuits each have a function of holding first and second potentials corresponding to first data at the first and second holding nodes. When a potential corresponding to second data is input to each of the first and second input wirings, the first circuit outputs a current to one of the first wiring and the second wiring and the second circuit outputs a current to the other of the first wiring and the second wiring. The currents output from the first and second circuits to the first wiring or the second wiring are determined in accordance with the first and second potentials held at the first and second holding nodes.