Neural Weight Compression With Unstructured Sparsity for Bandwidth Limits

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Solution Overview

Problem

Deep learning neural networks face performance bottlenecks due to large weight matrices causing memory bandwidth issues, which are exacerbated by increasing memory bandwidth requirements and re-training challenges associated with structured sparsity.

Innovation Solution

Implement unstructured sparsity to compress neural network weights, leveraging advanced vector and matrix extensions (AVX, AMX) for efficient compression and decompression, utilizing meta-data to manage compressed data and reduce bandwidth utilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If unstructured sparsity is implemented to compress neural network weights, then memory bandwidth requirements are reduced and inference performance is accelerated, but device complexity increases due to compression and decompression operations

Engineering Contradiction:
Improveinference performanceVSAvoidcompression and decompression operations
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-compressing neural network weights into unstructured sparse formats before inference execution. The compression is performed in advance during model preparation, converting dense weight matrices into sparse representations with stored metadata indicating non-zero element positions. This preliminary compression reduces memory bandwidth requirements during inference without affecting accuracy, as the compressed format is ready for efficient loading and processing.

Inventive Principle:
Principle #10Preliminary action

2Quantity of substance

If weight compression is applied to reduce memory bandwidth utilization, then memory bandwidth requirements are reduced, but manufacturing precision deteriorates due to compression artifacts

Engineering Contradiction:
Improvememory bandwidth utilizationVSAvoidweight accuracy
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent applies parameter changes by modifying the representation parameters of neural network weights from dense floating-point format to unstructured sparse format. This involves changing how weights are stored and transmitted by only preserving non-zero elements and their positions, rather than storing all elements. The parameter change from dense to sparse representation reduces memory bandwidth utilization significantly while maintaining computational accuracy through selective preservation of important weight parameters.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If advanced vector and matrix extensions are utilized for compression, then compression efficiency is improved, but device complexity increases

Engineering Contradiction:
Improvecompression efficiencyVSAvoidhardware requirements
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies mechanics substitution by replacing traditional software-based compression algorithms with hardware-accelerated compression using Advanced Vector Extensions (AVX) and Advanced Matrix Extensions (AMX). These instruction set extensions provide dedicated hardware support for vector and matrix operations, enabling efficient compression and decompression of neural network weights. The hardware substitution improves compression efficiency by leveraging specialized CPU instructions optimized for numerical linear algebra operations required in sparse weight compression.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS12425047B2Methods and apparatus to perform weight and activation compression and decompression
Publication Date: 2025.09.23 INTEL CORP
  • US12425047B2 patent drawing
  • US12425047B2 patent drawing
  • US12425047B2 patent drawing

AI summary

Methods, apparatus, systems, and articles of manufacture to perform weight and activation compression and decompression are disclosed. An example apparatus includes memory, instructions in the apparatus, and processor circuitry to execute the instructions to execute a compression operation to obtain compressed data corresponding to weights in a weight matrix, and determine meta-data associated with the weight matrix, a first portion of the meta-data indicative of whether the weight matrix is compressed, a second portion of the meta-data indicative of a cache size of the compressed data, and a third portion of the meta-data indicative of the compression operation executed to obtain the compressed data.