Neuromorphic A/D Converter With Column Processing for Low-Power Speed
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Solution Overview
Problem
Conventional processor architectures for neural networks face challenges with high power consumption and slow calculation speeds due to data transfer requirements during learning and inference processing, necessitating the development of a high-speed, low-power analog to digital (A/D) converter for neuromorphic devices with integrated memory.
Innovation Solution
A low-power, high-speed A/D converter for neuromorphic devices is proposed, incorporating column processing units, counters for time measurement during conversion, comparators for voltage comparison, and generators for reference signals, which convert analog signals to digital signals efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional processor architecture is used for neural network processing, then data transfer between memory and processor can be performed, but power consumption increases and calculation speed decreases
Solution Approach 1:
The patent merges memory and processor into a single neuromorphic device where memory is integrated inside the processor. This eliminates data transfer between separate memory and processor components, thereby reducing power consumption and increasing calculation speed for neural network operations.
Solution Approach 2:
The patent introduces an analog-to-digital converter as an intermediary component that enables efficient data conversion within the neuromorphic device. The A/D converter allows analog signals from the neuromorphic device to be converted to digital signals for processing, facilitating high-speed low-power operation while maintaining compatibility with digital circuits.
2Productivity
If high speed and low power A/D converter is implemented, then conversion efficiency improves, but device complexity increases
Solution Approach 1:
The A/D converter is segmented into multiple independent components: column processing units for parallel conversion, counters for time measurement, comparators for voltage comparison, and generators for reference signals. This segmentation enables high-speed conversion through parallel processing while managing complexity by dividing the system into specialized functional blocks.
Solution Approach 2:
The comparators automatically compare voltages and generate conversion results without external intervention. The generators autonomously produce reference signals needed for comparison. This self-service mechanism reduces the need for external control circuits, thereby achieving high conversion speed while limiting the increase in overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces power consumption and processing time by optimizing A/D conversion, enabling faster neural network operations and reducing the area required for the device, thus addressing the limitations of conventional architectures.
Implementation Method 1
one or more comparators which compares the voltage of reference signal and analog signal from neuromorphic device
Data Source
AI summary
An analog to digital converter is provided and includes column processing units that convert analog signal to digital signal. One or more counters count time of analog to digital conversion and one or more comparators compares the voltage of reference signal and analog signal from neuromorphic device. One or more generators generates the reference signal for the comparator.