Neuromorphic Code Processor In-Arrow Computation
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Solution Overview
Problem
Conventional Von Neumann computing systems consume high energy and processing time due to frequent memory access and high clock frequencies, unlike the efficient energy consumption of biologic nerve systems which process information through one-step feed-forward processing.
Innovation Solution
A neuromorphic code processor is developed using multiple 'Digital Perceptrons' and Configurable Interconnection Matrixes connected by bus-lines, mimicking the parallel information processing of biologic brains, allowing codes to be activated and propagated in a configured non-volatile memory array without high clock frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If Von Neumann computing systems use high clock frequencies and frequent memory access to complete computation steps, then processing speed is improved, but energy consumption increases significantly
Solution Approach 1:
The patent merges the storage and processing functions into a single unified structure where memory arrays directly perform computational operations. The same memory cells that store data are used to perform multiplication and accumulation operations, eliminating the need for separate processing units and reducing energy consumption associated with data movement between memory and processor.
Solution Approach 2:
The patent introduces an intermediary mechanism where memory arrays act as both storage and computation units. The memory cells serve as intermediaries that can hold data and simultaneously perform computational operations through controlled voltage applications, bridging the gap between storage and processing functions.
2Measurement precision
If Von Neumann computing systems access memory frequently to complete instruction steps, then computation accuracy is maintained, but processing time increases
Solution Approach 1:
The patent combines storage and computation in the same memory arrays, allowing data to be processed in-place without requiring frequent reads and writes between separate memory and processor units. This merging eliminates the time penalty associated with repeated memory access while maintaining computational accuracy through direct in-array operations.
Solution Approach 2:
The patent performs preliminary configuration of the memory arrays with computational weights and parameters before execution. This preliminary setup allows the memory arrays to perform multiple computational operations without requiring reconfiguration or repeated access to external programming memory, thus reducing processing time while maintaining accuracy.
3Use of energy by moving object
If biologic nerve systems use one-step feed-forward processing, then energy consumption is reduced, but computational complexity is limited
Solution Approach 1:
The patent implements dynamic reconfigurability where the memory arrays can be reprogrammed to perform different computational functions. The same physical hardware can be dynamically reconfigured to implement different algorithms, neural network architectures, or computational tasks, enabling complex computations while maintaining the energy efficiency of direct memory-based processing.
Solution Approach 2:
The patent creates a universal computing platform where the memory arrays can perform multiple functions including storage, multiplication, accumulation, and various logical operations. This multi-functionality allows the system to handle diverse computational tasks with a single unified architecture, overcoming the limitation of computational complexity while preserving energy efficiency.
Data Source
AI summary
Inspired by the processing methods of biologic brains, we construct a network of multiple configurable non-volatile memory arrays connected with bus-lines as a neuromorphic code processor for code processing. In contrast to the Von-Neumann computing architectures applying the multiple computations for code vector manipulations, the neuromorphic code processor of the invention processes codes according to their configured codes stored in the non-volatile memory arrays. Similar to the brain processor, the neuromorphic code processor applies the one-step feed-forward processing in parallel resulting in a dramatic power reduction compared with the computational methods in the conventional computer processors.