Neuromorphic Event-Driven Neural Computing Architecture
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Solution Overview
Problem
Current neuromorphic and synaptronic systems lack efficient event-driven architectures for neural networks that effectively simulate biological brain functions, particularly in terms of spike-timing dependent plasticity (STDP) and scalable low-power operation.
Innovation Solution
The development of a neuromorphic and synaptronic event-driven neural computing architecture featuring a scalable low-power network with digital CMOS spiking circuits, incorporating a crossbar memory synapse array and electronic neurons that integrate input spikes to generate spike events, and utilize a scheduler for deterministic event delivery, implementing STDP learning rules.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If traditional digital models are used for neural networks, then computational accuracy is maintained, but energy efficiency and biological function simulation are compromised
Solution Approach 1:
The patent replaces traditional digital von Neumann architecture with a neuromorphic architecture that uses analog-like continuous-time dynamics in spiking neurons and synapses. This substitution enables event-driven computation where only active neurons consume energy, achieving superior energy efficiency while maintaining computational functionality through biological plausibility rather than digital precision.
Solution Approach 2:
The patent changes the fundamental computation parameters from discrete digital states (0 and 1) to continuous analog states representing membrane potentials, synaptic conductances, and spike timings. This parameter transformation enables the system to simulate biological brain functions naturally while reducing energy consumption through sparse, event-driven activity patterns.
2Adaptability or versatility
If neuromorphic systems are designed to simulate biological brain functions, then biological plausibility is improved, but computational precision and traditional digital accuracy are reduced
Solution Approach 1:
The patent segments the neural computation into discrete functional modules: spiking neurons with threshold-based firing, synapses with conductance modulation, and scheduler for event routing. Each module operates with simplified biological principles rather than continuous precision, achieving adequate computational accuracy for neural network functions while maintaining high biological plausibility and adaptability.
Solution Approach 2:
The patent implements dynamic, event-driven computation where the system transitions between inactive and active states based on spike events. This dynamic operation allows the system to achieve sufficient computational accuracy only when needed (during spike events) while remaining inactive otherwise, balancing precision requirements with biological simulation fidelity.
3Loss of energy
If event-driven architecture is implemented for low-power operation, then energy consumption is reduced, but deterministic event delivery and timing control become more difficult
Solution Approach 1:
The patent implements a scheduler component that performs preliminary sorting and buffering of spike events before they are delivered to target neurons. The scheduler receives events in an event-driven manner but pre-organizes them according to a deterministic schedule, ensuring that events are delivered in a controlled, predictable sequence regardless of when they arrived, thus maintaining determinism while preserving low-power event-driven operation.
Solution Approach 2:
The scheduler acts as an intermediary between the event-driven spike generation and the deterministic delivery requirements. It buffers incoming asynchronous events and transforms them into synchronous, deterministic delivery sequences to target neurons, resolving the contradiction between energy-efficient event-driven operation and reliable timing control.
4Adaptability or versatility
If scalable neural network architecture is designed, then network size and complexity are increased, but power consumption and operational efficiency deteriorate
Solution Approach 1:
The patent designs the neural network as a modular architecture composed of identical, reusable core units, each containing neurons, synapses, and local schedulers. This segmentation enables linear scaling of network capacity while maintaining constant power consumption per unit, achieving scalability without proportional increase in total power consumption since inactive units consume negligible power.
Solution Approach 2:
The patent implements periodic clock signals that synchronize event-driven activity across the scalable network architecture. This periodic synchronization enables efficient coordination in large-scale networks without requiring continuous communication, reducing operational power consumption while maintaining scalability through the modular core units that can be replicated arbitrarily.
Data Source
AI summary
An event-driven neural network including a plurality of interconnected core circuits is provided. Each core circuit includes an electronic synapse array that has multiple digital synapses interconnecting a plurality of digital electronic neurons. A synapse interconnects an axon of a pre-synaptic neuron with a dendrite of a post-synaptic neuron. A neuron integrates input spikes and generates a spike event in response to the integrated input spikes exceeding a threshold. Each core circuit also has a scheduler that receives a spike event and delivers the spike event to a selected axon in the synapse array based on a schedule for deterministic event delivery.