Neuromorphic Resistor-Capacitor MAC Circuit for Low-Noise Analog Computing
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Solution Overview
Problem
Current neuromorphic devices face challenges in achieving reliable and power-efficient analog operations for neural network processing, particularly in efficiently performing multiply-accumulate (MAC) operations required for neural network processing.
Innovation Solution
A neuromorphic device is designed with serially connected resistors, current sources, capacitors, and switches, allowing for controlled current flow and voltage measurement to calculate the sum of multiplications of inputs and weights, utilizing variable resistors and magnetic memory devices to represent resistance values, enabling efficient MAC operations in an analog domain.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If analog operations are used for MAC operations in neural network processing, then power efficiency is improved, but reliability deteriorates due to noise and operational uncertainties
Solution Approach 1:
The patent divides the analog computation process into distinct phases: weight application phase, input application phase, and reading phase. Each phase is controlled by specific switch configurations that isolate operational stages, reducing noise accumulation while maintaining analog power efficiency. The resistor lines are segmented into multiple rows with independent control, allowing selective operation to minimize noise impact.
Solution Approach 2:
The patent applies weights to the resistor lines before applying inputs during the computation phase. This preliminary weight application ensures that the resistance values are stabilized and ready for the actual MAC operation, reducing operational uncertainties. The switch configurations are pre-set to appropriate states before each computational phase begins.
2Reliability
If digital computers are used for neural network processing, then reliability is maintained, but power efficiency deteriorates due to repeated memory access and digital computation
Solution Approach 1:
The patent replaces digital computation mechanics with analog computation mechanics. Instead of digital processors performing multiply-accumulate operations through sequential digital logic, the system uses analog resistor lines where currents naturally perform multiplication (I=V/R) and addition (parallel current paths) operations. This substitution eliminates the need for repeated memory access and digital processing, dramatically reducing power consumption while maintaining reliability through controlled analog operations.
3Use of energy by moving object
If analog resistor lines are used for MAC operations, then power efficiency is improved, but noise and reliability issues worsen
Solution Approach 1:
The patent employs periodic action by dividing the analog computation into distinct temporal phases: weight application phase, input application phase, and reading phase. Each phase lasts for a specific time period with dedicated switch configurations. This periodic structuring allows noise to settle between phases and enables synchronized reading operations that minimize noise impact while preserving the power efficiency of analog computation.
Solution Approach 2:
The patent introduces switch networks as intermediary elements between the analog resistor lines and the reading circuitry. These switches act as controlled gates that isolate the analog computation phase from the reading phase, preventing noise from the reading operation from interfering with the computation. The switches mediate the transition between different operational phases, maintaining signal integrity while enabling efficient analog MAC operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The neuromorphic device improves reliability and power efficiency by effectively performing MAC operations, enabling efficient neural network processing and reducing noise and reliability issues associated with serially connected resistors.
Implementation Method 1
a first resistor line comprising a plurality of first resistors that are serially connected to each other, a second resistor line comprising a plurality of second resistors that are serially connected to each other
Implementation Method 2
a first capacitor configured to be electrically connected to the first resistor line, and a second capacitor configured to be electrically connected to the second resistor line
Data Source
AI summary
A neuromorphic device includes a first resistor line having a plurality of first resistors that are serially connected to each other, a second resistor line having a plurality of second resistors that are serially connected to each other, one or more current sources to control a current flowing in each of the first resistor line and the second resistor line to a respective current value, a first capacitor electrically connectable to the first resistor line, and a second capacitor electrically connectable to the second resistor line.