Neuromorphic Processing Clusters for Memory-Efficient Convolution
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Solution Overview
Problem
Neuromorphic processors require substantial memory to define the large number of connections needed for convolution operations, which is inefficient and costly.
Innovation Solution
A neuromorphic processing system with enhanced message receiving and transmitting facilities that utilize a common pattern to reduce memory requirements by using a pattern header memory and synapse property memory to facilitate event message distribution, allowing a single memory entry to specify all connections and perform convolution operations with modest memory load.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a large number of connections are defined for convolution operations in neuromorphic processors, then the processing capability is improved, but the memory requirements increase substantially
Solution Approach 1:
The patent segments the connectivity information into two parts: a compact pattern definition stored in pattern header memory, and dynamic destination addresses generated during operation. This segmentation allows the system to define complex convolution patterns (5x5, 7x7 kernels) without storing all individual connection mappings, thereby reducing memory requirements while maintaining processing capability.
Solution Approach 2:
The pattern header memory pre-stores the structural pattern of connections (relative offsets, kernel dimensions) without storing all specific destination addresses. This preliminary action enables the system to generate full connectivity information on-demand during operation, reducing the memory burden of storing complete connection tables for large-scale convolutions.
2Quantity of substance
If the message receiving facility retrieves pattern information from pattern header memory for each event message, then memory usage is reduced, but the access complexity increases
Solution Approach 1:
The pattern header memory serves multiple functions: it stores convolution kernel patterns, defines recipient sets, and provides destination address generation rules. This multi-functionality reduces the need for separate storage structures for different types of connectivity information, simplifying the overall memory architecture despite the added retrieval logic.
Solution Approach 2:
The pattern header memory acts as an intermediary between the compact pattern definition and the full destination address space. It translates relative pattern offsets into absolute destination addresses, mediating between the reduced memory representation and the actual connection targets, thereby managing complexity through structured intermediation.
3Productivity
If event messages are transmitted to multiple recipient neuromorphic elements according to a convolution pattern, then the computational efficiency is improved, but the message exchange network load increases
Solution Approach 1:
The patent merges multiple destination addresses into a single event message by incorporating a recipient set identifier and pattern reference. Instead of sending separate messages to each of the 25 recipients in a 5x5 convolution, a single message carries the pattern reference that enables all recipients to be notified efficiently, reducing network traffic while maintaining computational efficiency.
Solution Approach 2:
The system uses pattern copying where the convolution pattern is replicated across multiple message transmissions with different offset values. Each message carries a reference to the base pattern, and the pattern is virtually copied to different destination sets through address generation, reducing the need to transmit the full pattern definition repeatedly and thus lowering network load.
Data Source
AI summary
A neuromorphic processing system (1) is disclosed comprising a plurality of neuromorphic processing clusters (100) coupled to a message exchange network (20) for exchange of event messages. A neuromorphic cluster therein comprises a message receiving facility (110) to receive event messages from the message exchange network, a message transmitting facility (120) to transmit event messages via the message exchange network and a neuromorphic processor (130) having a set of state memory entries (10j) for storing a value representative of a neuromorphic state associated with a neuromorphic element and a computation facility (134) to update the neuromorphic state associated with neuromorphic elements that are indicated as the destination of the event message. The message receiving facility (110) and/or the message transmitting facility (120) are enhanced to enable message distribution according to a pattern.