2D Array Neuromorphic Processor Multi-Bit Processing
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Solution Overview
Problem
Current two-dimensional array-based neuromorphic processors face challenges in performing multi-bit operations efficiently, requiring complex circuits and high power consumption, and struggle with achieving high accuracy in image/time-series information processing due to limited resolution and the need for peripheral components like ADC and DAC.
Innovation Solution
A two-dimensional array-based neuromorphic processor design that includes axon circuits, synapse circuits, and neuron circuits, where synapse circuits store weights and output operation values based on time information, allowing for multi-bit operations through bit-wise AND operations and addition, enabling high-resolution processing without requiring additional peripheral circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If complex circuits are used to perform multi-bit operations, then operation accuracy is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent segments multi-bit operations into multiple time steps, where each time step processes one bit of the operation. This temporal segmentation allows simple 1-bit circuits to achieve multi-bit operation capability without requiring complex parallel circuits, thus resolving the contradiction between operation accuracy and circuit complexity
Solution Approach 2:
The patent implements periodic action by performing multi-bit operations sequentially over multiple time steps. Each time step executes a simple bit operation, and the results are accumulated over time. This periodic execution of simple operations achieves the functionality of complex circuits while maintaining low complexity and power consumption
2Measurement precision
If peripheral components like ADC and DAC are added, then processing accuracy is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent enables the neuromorphic processor to perform multi-bit operations natively using its core circuitry (synapse circuits and neuron circuits) without requiring external peripheral components like ADC and DAC. The processor serves itself by utilizing its inherent computational elements to achieve high-resolution processing, thereby eliminating the need for additional complex peripheral devices
3Measurement precision
If higher resolution processing is implemented, then processing accuracy is improved, but circuit complexity increases
Solution Approach 1:
The patent segments the resolution enhancement into temporal segments rather than spatial segments. Instead of using parallel high-resolution circuits simultaneously, it processes bits sequentially over time, allowing the same simple circuit to achieve high resolution through time-multiplexed operation, thus avoiding the complexity increase that would result from parallel high-resolution circuitry
Data Source
AI summary
A 2D array-based neuromorphic processor includes: axon circuits each being configured to receive a first input corresponding to one bit from among bits indicating n-bit activation; first direction lines extending in a first direction from the axon circuits; second direction lines intersecting the first direction lines; synapse circuits disposed at intersections of the first direction lines and the second direction lines, and each being configured to store a second input corresponding to one bit from among bits indicating an m-bit weight and to output operation values of the first input and the second input; and neuron circuits connected to the first or second direction lines, each of the neuron circuits being configured to receive an operation value output from at least one of the synapse circuits, based on time information assigned individually to the synapse circuits, and to perform an arithmetic operation by using the operation values.