Neuromorphic Memory Array Reference Currents for Stable ADC Inference
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Solution Overview
Problem
Neuromorphic computing devices using resistive memory cells suffer from inaccuracies due to temperature and time dependencies, which affect the reliability and accuracy of operations.
Innovation Solution
A neuromorphic computing device incorporating a first memory cell array and a second reference memory cell array, along with current-to-voltage and analog-to-digital converting circuits, to stabilize signal voltages and convert them into digital signals using reference voltages, thereby mitigating the effects of temperature and time dependencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If resistive memory cells are used for neuromorphic computing operations, then the device can perform MAC operations efficiently, but temperature and time dependencies cause inaccurate inferences
Solution Approach 1:
The patent changes the parameter representation by converting analog currents from resistive memory cells into digital signals through ADC circuits. This parameter transformation allows the system to maintain the computational efficiency of analog MAC operations while eliminating the reliability issues caused by temperature and time dependencies of resistive memory cells, as digital signals are immune to these physical variations.
Solution Approach 2:
The patent introduces intermediary conversion circuits (current-to-voltage converters and ADCs) that mediate between the resistive memory cells and the computational logic. These intermediaries transform the problematic analog currents into stable digital signals, allowing the system to benefit from both the efficiency of analog computation and the reliability of digital processing.
2Speed
If analog currents are directly used from resistive memory cells, then computation speed is maintained, but signal instability due to temperature and time affects accuracy
Solution Approach 1:
The patent substitutes the direct analog signal path with a digital signal processing path. By replacing the direct use of analog currents with digital signal representation through ADC conversion, the system maintains computation speed while achieving stable and accurate signal measurement that is independent of temperature and time variations.
3Reliability
If reference resistive memory cells are added to compensate for temperature and time effects, then inference accuracy improves, but device complexity increases
Solution Approach 1:
The patent creates a copy of the memory cell array structure dedicated to generating reference currents. These reference resistive memory cells are configured to produce currents that compensate for temperature and time dependencies. By copying the array structure and using it for reference generation, the system achieves accurate compensation while maintaining a systematic and scalable approach to the additional complexity.
4Measurement precision
If current-to-voltage and analog-to-digital converting circuits are added, then signal stability and accuracy improve, but circuit complexity increases
Solution Approach 1:
The patent segments the signal conversion process into distinct functional stages: current-to-voltage conversion followed by analog-to-digital conversion. This segmentation allows each conversion stage to be optimized independently and facilitates modular implementation, reducing the overall complexity burden by breaking down the complex conversion task into manageable, specialized circuit blocks.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the reliability and accuracy of neuromorphic computing devices by stabilizing signal voltages and reducing inaccuracies due to temperature and time dependencies in resistive memory cells.
Implementation Method 1
a first memory cell array including a plurality of resistive memory cells and configured to output a plurality of read currents through a plurality of bit lines or source lines
Implementation Method 2
a current-to-voltage converting circuit configured to output a plurality of signal voltages respectively corresponding to the plurality of read currents
Implementation Method 3
an analog-to-digital converting circuit configured to convert the plurality of signal voltages to a plurality of digital signals using the at least one reference voltage
Data Source
AI summary
A neuromorphic computing device includes a first memory cell array comprising a plurality of resistive memory cells and configured to output a plurality of read currents through a plurality of bit lines or source lines; a second memory cell array comprising a plurality of reference resistive memory cells and configured to output at least one reference current through at least one reference bit line or at least one reference source line; a current-to-voltage converting circuit configured to output a plurality of signal voltages respectively corresponding to the plurality of read currents and output at least one reference voltage corresponding to the at least one reference current; and an analog-to-digital converting circuit configured to convert the plurality of signal voltages to a plurality of digital signals using the at least one reference voltage and output the plurality of digital signals.