Neuromorphic SPAD Array Event Circuits for Low-Bandwidth 3D Imaging
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The data transfer bottleneck in 3D imaging systems using Single-Photon Avalanche Diode (SPAD) arrays limits the speed of operation, particularly in DToF SPAD array systems, as significant bandwidth is required to transfer data from each SPAD cell, which grows with increasing array size.
Innovation Solution
A method and microchip design that records the inter-pixel photon arrival order and transmits it off-chip, using receptive fields and neural feature circuits to detect predefined triggering patterns, allowing for asynchronous data transfer and reducing the need for time-stamping, with a counter synchronized to the laser pulse for distance calculation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If data from each SPAD cell is transferred using traditional time-stamping methods, then measurement precision is maintained, but bandwidth requirements increase significantly limiting operation speed
Solution Approach 1:
The patent extracts only the essential information needed for depth calculation - the order of photon arrival between pixels - rather than transferring complete time-stamped data from every SPAD cell. This selective extraction of critical data reduces bandwidth requirements while preserving the ability to calculate time of flight and depth information.
Solution Approach 2:
Instead of recording absolute time stamps for each photon event and calculating depth from timing differences, the patent inverts the approach by recording the relative order of arrival between pixels. This inverted methodology captures the essential depth information through ordering rather than absolute timing, significantly reducing data transfer requirements.
2Measurement precision
If array size is increased to improve imaging resolution, then measurement precision improves, but bandwidth requirements grow limiting operation speed
Solution Approach 1:
The patent extracts only the relative ordering information of photon arrivals between pixels rather than complete event data. This extraction approach ensures that bandwidth requirements scale with the number of pixel pairs rather than the total number of pixels, allowing high-resolution arrays to operate at high speeds without proportional bandwidth increases.
3Measurement precision
If complete photon timing data is transferred off-chip, then measurement precision is maintained, but device complexity increases
Solution Approach 1:
The patent extracts only the essential ordering information needed for depth calculation rather than transferring complete timing data. This reduces the complexity of data transfer infrastructure while preserving measurement precision, as the ordering information contains all necessary data for time of flight calculation without requiring complex high-bandwidth transfer mechanisms.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the bandwidth requirements and enhances the speed of 3D imaging by efficiently transmitting pixel data off-chip, enabling high-resolution and high-frame-rate 3D imaging without compromising functionality.
Implementation Method 1
Avalanche multiplication occurs when an incident photon with sufficient energy to liberate an electron arrives at the photodiode. The high electric field rapidly accelerates the photo-generated electron towards the anode, but before it can reach the anode, it collides with the intervening doped material releasing further electrons, all of which are then accelerated towards the anode. This process repeats leading to avalanche multiplication of the photo-generated electron and an output current pulse.
Implementation Method 2
Avalanche photodiodes (APDs) are solid-state photodetectors in which a high bias voltage is applied to a p-n junction to provide a high first stage gain due to avalanche multiplication. Avalanche multiplication occurs when an incident photon with sufficient energy to liberate an electron arrives at the photodiode.
Data Source
Figure 1A~1B
Figure 1C~2A
Figure 2B
AI summary
Described is a Single-Photon Avalanche Diode (SPAD) array microchip comprising: a plurality of SPAD sensors; and a triggering circuit configured to detect and read out the triggering order of SPAD sensors over a timing interval wherein the timing interval comprises one or more frames. An event based neuromorphic SPAD array microchip is also described. The chip architecture and triggering methodology takes a local group of SPAD sensors connected in a certain way and by using simple digital circuits emulating how neurons behave, patterns within a local receptive field are identified. Only when these unique patterns or features are identified are "events" triggered for each receptive field in the order they occur, or in an asynchronous manner. Each neuromorphic circuit (or collection of silicon neurons) act over overlapping receptive fields, and are tiled across the entire visual spatial field of the SPAD array to a form a convolution layer.