Neuromorphic Synaptronic Circuit with Deterministic Simulation
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Solution Overview
Problem
Current neuromorphic-synaptic systems face challenges in implementing low-power, ultra-dense neuromorphic-synaptic circuit chips that effectively mimic biological brains, particularly in achieving a one-to-one correspondence between simulation and hardware for spiking neural networks with learned synaptic weights.
Innovation Solution
The implementation of digital integrate-and-fire neurons with discrete-valued synapses at cross-point junctions in a neuromorphic-synaptic circuit chip, maintaining a one-to-one correspondence with simulation, and eliminating randomness to achieve low-power consumption and a compact form factor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If traditional digital models of manipulating 0s and 1s are used, then computational functionality is achieved, but the system does not effectively mimic biological brains and cannot achieve low-power consumption
Solution Approach 1:
The patent replaces traditional digital mechanical computing systems with neuromorphic-synaptronic systems that use continuous analog signals to model biological neurons and synapses. This substitution enables both low-power consumption through event-driven computation and effective biological brain mimicry through continuous conductance modulation at synapses.
Solution Approach 2:
The patent changes the fundamental operating parameters from discrete digital values (0s and 1s) to continuous analog values representing membrane potentials and synaptic conductances. This parameter transformation enables the system to simultaneously achieve biological realism through continuous dynamics and energy efficiency through sparse, event-driven updates.
2Measurement precision
If one-to-one correspondence between simulation and hardware is maintained, then accuracy of learned synaptic weights is improved, but device complexity increases
Solution Approach 1:
The patent implements a universal crossbar array architecture where the same hardware structure serves both as the computational engine for spiking neural networks and as the storage medium for learned synaptic weights. This multi-functionality maintains one-to-one correspondence between simulation and hardware while avoiding the need for separate precision components, thereby reducing overall device complexity.
Solution Approach 2:
The patent transforms continuous simulated synaptic weights into discrete quantized values that can be directly stored in the crossbar array. This parameter transformation maintains the essential accuracy of learned weights while simplifying the hardware representation, eliminating the need for complex high-precision analog storage mechanisms.
3Ease of manufacture
If physical and logical interconnectivity constraints of the chip are incorporated into the simulation, then feasibility of hardware implementation is improved, but simulation complexity increases
Solution Approach 1:
The patent performs preliminary simulation and optimization of the spiking neural network while explicitly incorporating the chip's physical and logical interconnectivity constraints. By conducting this preliminary action before hardware fabrication, the design ensures manufacturability is built-in from the start, avoiding the need for complex post-manufacturing adjustments or redesigns.
Solution Approach 2:
The patent creates an accurate computational model (simulation) that copies the essential characteristics of the physical chip architecture, including interconnectivity constraints. This copying approach allows complex hardware feasibility considerations to be integrated into the simulation domain, where they can be managed algorithmically rather than physically.
4Reliability
If all sources of randomness or non-determinism are eliminated on the chip, then reliability of computation is improved, but ease of operation decreases
Solution Approach 1:
The patent transforms the operational interface from probabilistic to deterministic by eliminating random number generation and non-deterministic elements from the hardware. Computation reliability is improved through consistent, reproducible results. Operational flexibility is maintained through software-based control mechanisms that can program the neuromorphic-synaptronic system for various computational tasks without requiring hardware-level randomness.
Data Source
AI summary
Embodiments of the invention provide neuromorphic-synaptronic systems, including neuromorphic-synaptronic circuits implementing spiking neural network with synaptic weights learned using simulation. One embodiment includes simulating a spiking neural network to generate synaptic weights learned via the simulation while maintaining one-to-one correspondence between the simulation and a digital circuit chip. The learned synaptic weights are loaded into the digital circuit chip implementing a spiking neural network, the digital circuit chip comprising a neuromorphic-synaptronic spiking neural network including plural synapse devices interconnecting multiple digital neurons.