Neuron Circuit Online Learning via LTP and LTD Mechanisms

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Solution Overview

Problem

Existing spiking neural networks (SNNs) face challenges in implementing online learning due to the need for batch learning, which is resource-intensive and time-consuming, and require significant memory for data storage, limiting their flexibility and efficiency.

Innovation Solution

A neuron circuit designed for online learning in SNNs, incorporating internal circuits for spike input processing, membrane potential generation, and online learning mechanisms such as long-term potentiation (LTP) and long-term depression (LTD), allowing for hardware-efficient and accurate synaptic weight updates based on real-time data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If batch learning is used for SNN learning, then learning accuracy can be improved, but learning time and resource consumption increase significantly

Engineering Contradiction:
Improvelearning accuracyVSAvoidlearning time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent implements dynamic online learning in the neuron circuit that continuously updates synaptic weights as data arrives, rather than static batch learning. The learning process adapts in real-time to new inputs, enabling the system to maintain learning accuracy while significantly reducing learning time by eliminating the need to process entire datasets at once.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The neuron circuit performs preliminary learning actions by maintaining and updating synaptic weights continuously in hardware, so that when new data arrives, the learning can immediately begin without requiring full data re-loading or extensive preprocessing, thus reducing overall learning time while maintaining accuracy.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If batch learning is used for SNN learning, then comprehensive data processing is achieved, but hardware resources and memory requirements increase

Engineering Contradiction:
Improvelearning completenessVSAvoidhardware resources
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The neuron circuit performs self-service learning by continuously updating its own synaptic weights through hardware-based online learning mechanisms. The circuit processes data streams in real-time, maintaining learning completeness while minimizing external memory requirements, as the learning state is preserved in the synaptic weight values within the circuit itself.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The neuron circuit is designed with multi-functionality, serving both as a computational unit and a learning unit simultaneously. The same hardware structure performs both forward propagation and weight updates, eliminating the need for separate learning hardware and reducing overall device complexity while maintaining comprehensive data processing capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If online learning is implemented in neuron circuits, then learning speed and system flexibility improve, but circuit complexity increases

Engineering Contradiction:
Improvelearning speedVSAvoidcircuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges the learning function directly into the neuron circuit structure by integrating synaptic weight storage and update mechanisms with the computational elements. This combination eliminates the need for separate learning hardware and data transfer infrastructure, achieving fast online learning while controlling circuit complexity through functional integration.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent replaces complex mechanical or software-based learning systems with hardware-based neural circuit implementations. By using electronic neural circuits with inherent parallel processing capability and analog or digital synaptic weight representation, the system achieves high learning speed while the circuit complexity remains manageable through efficient hardware architecture.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

4Measurement precision

If data is stored for batch learning, then learning accuracy is maintained, but memory requirements and cost increase

Engineering Contradiction:
Improvelearning accuracyVSAvoidmemory capacity
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The neuron circuit maintains learning state information within itself through synaptic weight values stored in the circuit's internal memory elements. This self-service approach eliminates the need for external large-capacity memory storage, as the circuit continuously processes and learns from data streams while preserving learning progress in its own hardware state, thus maintaining learning accuracy with minimal memory requirements.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20230289582A1Neuron circuit with synaptic weight learning
Publication Date: 2023.09.14 ELECTRONICS & TELECOMM RES INST
  • US20230289582A1 patent drawing
  • US20230289582A1 patent drawing
  • US20230289582A1 patent drawing

AI summary

A neuron circuit including a first internal circuit that receives a plurality of spike input signals, generates a first sum value by summing a plurality of synaptic weights corresponding to the plurality of spike input signals, and outputs a second sum value by adding a membrane potential value to the first sum value, a spike generating circuit that generates a spike output signal, a membrane potential generating circuit that generates the membrane potential value, a second internal circuit that counts a last spike time based on the spike output signal, and an online learning circuit that receives a last input time from the first internal circuit and performs LTP learning based on the last input time or receives the last spike time from the second internal circuit and performs LTD learning based on the last spike time.