Neuron Learning IC with Zener Diode Soma Circuit
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Solution Overview
Problem
Current neural network integrated circuits face limitations in scalability and complexity due to the need for numerous synapse circuits and weight storage registers, which restricts the integration of a large number of neuron circuits on a single chip, making it difficult to replicate the human brain's neural network density and functionality.
Innovation Solution
A neuron learning type integrated circuit device is designed with a threshold learning model, utilizing CMOS transistors and a configuration of synapse and soma circuits that mimic the human brain's neural structure, allowing for a high-density integration of neuron cell units and dynamic reconfiguration of connections, enabling efficient learning and information processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional weight learning type neural networks are used, then learning functionality is achieved, but the number of synapse circuits and weight storage registers increases, reducing scalability and integration density
Solution Approach 1:
The patent extracts the weight storage function from traditional synapse circuits by introducing separate threshold holding circuits (capacitors) that independently store threshold values for each neuron. This separation eliminates the need for weight storage registers associated with each synapse, reducing the overall number of storage elements while preserving learning functionality through threshold adaptation.
Solution Approach 2:
The patent implements multi-functional circuits where the same synapse circuit structure can be reused across multiple neurons. The threshold holding circuits serve dual purposes: storing threshold values for neuron activation decisions and adapting thresholds during learning processes. This universality reduces the total number of circuit instances needed compared to traditional architectures where each synapse requires dedicated weight storage.
2Quantity of substance
If more neuron circuits are integrated on a single chip, then neural network density increases, but the complexity of interconnections and resource requirements increases
Solution Approach 1:
The patent segments the neural network architecture into independent neuron cell units, each containing a soma circuit, synapse circuits, and threshold holding circuits. This modular segmentation allows neurons to be replicated and tiled across the chip without proportionally increasing interconnection complexity, as each unit operates semi-independently with standardized interfaces.
Solution Approach 2:
The patent transitions from a traditional planar integration approach to a three-dimensional stacked architecture where multiple layers of neuron circuits are vertically interconnected. This dimensional change allows high-density integration of millions of neurons on a single chip while managing interconnection complexity through vertical routing rather than extensive lateral wiring.
3Productivity
If threshold learning model is implemented with separate threshold holding circuits, then learning efficiency improves, but circuit area increases
Solution Approach 1:
The patent merges the threshold holding circuits directly within each neuron cell unit, combining the threshold storage capacitors with the soma circuit and synapse circuits. This integration reduces the overall area compared to separate threshold storage modules, while still enabling efficient threshold adaptation during learning by keeping threshold values locally accessible to each neuron.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the integration of a colossal neural network with millions of neuron cells on a single chip, mimicking the human brain's neural structure and functionality, facilitating advanced information processing, learning, and self-organization, while reducing the complexity and cost of traditional neural network implementations.
Implementation Method 1
The soma circuit unit includes a Zener diode having an input terminal and an output terminal, the input terminal being connected to the fourth terminal
Implementation Method 2
Each of the plurality of synapse circuit units includes a first condenser, one end of the first condenser being connected between the second terminal and the third terminal
Data Source
AI summary
According to one embodiment, a neuron learning type integrated circuit device includes neuron cell units. Each of the neuron cell units includes synapse circuit units, and a soma circuit unit connected to the synapse circuit units. Each of the synapse circuit units includes a first transistor including a first terminal, a second terminal, and a first control terminal, a second transistor including a third terminal, a fourth terminal, and a second control terminal, a first condenser, one end of the first condenser being connected between the second and third terminals, and a control line connected to the first and second control terminals. The soma circuit unit includes a Zener diode including an input terminal and an output terminal, the input terminal being connected to the fourth terminal, and a second condenser, one end of the second condenser being connected between the fourth terminal and the input terminal.