Neurosynaptic Core Utilization via Computational Block Segmentation

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Solution Overview

Problem

Current neurosynaptic networks require a large number of cores, which increases costs and energy consumption, as each core contributes significantly to the overall system costs and power usage, despite the number of neurons and axons being less costly.

Innovation Solution

The method involves dividing large computational blocks into smaller subunits and reallocating them across a reduced number of cores, increasing the number of neurons while maintaining or slightly modifying spike activity, thereby reducing the total number of cores needed without affecting output functionality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If a large number of cores are used in neurosynaptic networks, then computational capacity and processing power are improved, but system cost and energy consumption increase significantly

Engineering Contradiction:
Improvecomputational capacityVSAvoidenergy consumption
Core Design Contradiction:
PowerVSUse of energy by moving object

Solution Approach 1:

The patent divides computational blocks into smaller subunits that can be distributed across fewer cores. By segmenting the computational workload and reorganizing how neurons and axons are allocated across cores, the system achieves the same computational capacity with reduced core count, thereby lowering energy consumption while maintaining processing power

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges computational functionality by increasing the density of neurons and axons within each core. By combining more neural elements into fewer cores through optimized allocation, the system maintains overall computational capacity while reducing the total number of cores required, thus decreasing energy consumption

Inventive Principle:
Principle #5Merging (Combining)

2Power

If a large number of cores are used in neurosynaptic networks, then computational capacity is improved, but system cost increases

Engineering Contradiction:
Improvecomputational capacityVSAvoidsystem cost
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

By segmenting computational blocks and redistributing neural elements across fewer cores, the patent reduces the total core count required. This segmentation strategy maintains computational capacity while simplifying the overall system architecture, leading to reduced manufacturing costs and lower system complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes key parameters by increasing neuron and axon density within each core while reducing the total number of cores. This parameter transformation allows the system to achieve the same computational output with fewer physical components, thereby reducing device complexity and associated costs

Inventive Principle:
Principle #35Parameter changes

3Productivity

If functional units are divided into subunits and reallocated, then core utilization is optimized and number of cores is reduced, but network configuration complexity increases

Engineering Contradiction:
Improvecore utilizationVSAvoidnetwork configuration
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing functional units into subunits and redistributing them across cores. While this improves core utilization, the patent manages the accompanying configuration complexity through systematic reorganization methods that maintain network functionality while optimizing resource allocation

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11586893B2Core utilization optimization by dividing computational blocks across cores
Publication Date: 2023.02.21 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11586893B2 patent drawing
  • US11586893B2 patent drawing
  • US11586893B2 patent drawing

AI summary

Core utilization optimization by dividing computational blocks across neurosynaptic cores is provided. In some embodiments, a neural network description describing a neural network is read. The neural network comprises a plurality of functional units on a plurality of cores. A functional unit is selected from the plurality of functional units. The functional unit is divided into a plurality of subunits. The plurality of subunits are connected to the neural network in place of the functional unit. The plurality of functional units and the plurality of subunits are reallocated between the plurality of cores. One or more unused cores are removed from the plurality of cores. An optimized neural network description is written based on the reallocation.