Time-division multiplexed neurosynaptic module with implicit memory addressing
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Solution Overview
Problem
Current neuromorphic and synaptronic computation systems lack efficient methods for implementing neural networks with implicit memory addressing and time-division multiplexing, which are essential for simulating biological brain functions effectively.
Innovation Solution
A time-division multiplexed neurosynaptic module with implicit memory addressing is developed, comprising a memory device for maintaining neuron attributes and a scheduler that manages incoming firing events, using a multi-way processor to integrate and update these attributes in a parallel manner, mimicking the functionality of biological neurons through electronic circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional digital models are used for neural network computation, then implementation is straightforward with binary manipulation, but the system cannot effectively simulate biological brain functions
Solution Approach 1:
The system segments neural network computation into discrete time steps and individual neuron processing events. Each neuron is processed independently at specific time points, with firing events being handled separately through time-division multiplexing. This segmentation enables biological-like neural simulation while maintaining manageable computational complexity through structured event handling.
Solution Approach 2:
The system implements dynamic time-division multiplexing where processing resources are dynamically allocated to different neurons based on their firing events and current time step. The multi-way processor dynamically switches between processing different neuron attributes (membrane potential, threshold, synaptic weights) depending on incoming events, enabling flexible biological function simulation without requiring static complex architecture.
2Productivity
If neuron attributes are updated simultaneously for all neurons, then parallel processing efficiency is achieved, but memory addressing complexity increases without implicit addressing mechanisms
Solution Approach 1:
The system performs preliminary organization of neuron attributes in memory before processing begins. Neuron attributes are pre-positioned at specific memory locations corresponding to their neuron identifiers. This preliminary arrangement enables subsequent parallel updates to proceed efficiently without complex runtime addressing calculations, as each neuron's data is already in its final processing location.
Solution Approach 2:
The memory structure is designed to be self-service through implicit addressing, where the memory address is automatically determined by the neuron identifier without requiring external address calculation or translation. When a neuron event occurs, the system directly accesses the corresponding memory location using the neuron's inherent identifier, eliminating the need for complex address generation logic and enabling efficient parallel access.
3Productivity
If time-division multiplexing is implemented for integrating incoming firing events, then processing efficiency for biological neural simulation is improved, but the system requires sophisticated scheduling and memory management
Solution Approach 1:
The system implements periodic time-step processing where all neuron updates occur at regular, discrete time intervals rather than continuously. Incoming firing events are accumulated and processed in periodic batches corresponding to neural simulation time steps. This periodic approach simplifies scheduling by establishing predictable processing cycles, reducing the complexity of real-time event coordination while maintaining biological simulation accuracy.
Data Source
AI summary
Embodiments of the invention relate to a time-division multiplexed neurosynaptic module with implicit memory addressing for implementing a neural network. One embodiment comprises maintaining neuron attributes for multiple neurons and maintaining incoming firing events for different time steps. For each time step, incoming firing events for said time step are integrated in a time-division multiplexing manner. Incoming firing events are integrated based on the neuron attributes maintained. For each time step, the neuron attributes maintained are updated in parallel based on the integrated incoming firing events for said time step.