Neutralized Differential Pair VGA for Stable mmWave Gain Control
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Solution Overview
Problem
Conventional variable gain amplifiers face challenges in controlling gain without affecting input and output impedances and frequency response, especially at mmWave and subTHz frequencies, leading to signal-to-noise ratio degradation and increased baseline insertion loss.
Innovation Solution
The implementation of complementary switched neutralized differential pairs (NDPs) in amplifier stages, which maintain impedance matching and frequency response across gain states through parallel arrays of switchable differential pairs and a fixed capacitively neutralized pair, ensuring broadband operation and reduced baseline loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional variable gain amplifiers control gain using switchable differential pairs, then gain variability is improved, but input and output impedance matching deteriorates and frequency response varies across gain states
Solution Approach 1:
The amplifier is divided into multiple independent gain stages, each with its own switchable differential pair. This segmentation allows individual control of each stage's contribution to the total gain while maintaining consistent impedance characteristics across all stages, as each stage operates independently with matched input and output impedances.
Solution Approach 2:
The invention changes the operating parameters of the differential pairs by switching between different bias current levels rather than changing the physical configuration of the amplifier. This allows gain control while maintaining constant impedance parameters, as the bias current change affects gain without altering the impedance matching characteristics of the differential pairs.
2Adaptability or versatility
If conventional variable gain amplifiers use switchable differential pairs for gain control, then dynamic range is improved, but signal-to-noise ratio deteriorates due to increased baseline insertion loss
Solution Approach 1:
The amplifier employs dynamic switching of differential pairs where pairs are selectively enabled or disabled based on the desired gain level. This dynamic operation allows the amplifier to maintain optimal signal paths with minimal insertion loss by keeping only the necessary number of differential pairs active, rather than having all pairs continuously connected as in conventional designs.
Solution Approach 2:
The invention extracts and removes unnecessary differential pairs from the active signal path when high gain is not required. By taking out redundant differential pairs from the circuit configuration, the baseline insertion loss is reduced while still maintaining the capability for high dynamic range operation when full gain is needed.
3Adaptability or versatility
If conventional variable gain amplifiers change gain settings, then adaptability is improved, but bandwidth and frequency response deteriorate
Solution Approach 1:
The broadband amplifier is segmented into multiple gain stages with complementary switched neutralized differential pairs. Each stage is designed to maintain consistent frequency response characteristics regardless of its gain setting, and the cascaded stages collectively preserve broadband performance across all gain configurations.
Solution Approach 2:
The amplifier incorporates neutralization capacitances that are pre-configured to compensate for frequency response variations that would occur during gain switching. This beforehand cushioning ensures that bandwidth and frequency response remain stable across all gain settings by counteracting potential degradations before they affect performance.
Data Source
AI summary
An integrated circuit device includes a variable gain amplifier with multiple gain circuits coupled in parallel, where one or more of the multiple gain circuits comprises a first differential pair of transistors, and a complementarily switched second differential pair of transistors cross-connected to the first differential pair of transistors with a sign inversion relative to the first differential pair of transistors. Other examples are disclosed and claimed.