Complex NFA State Matching with Parallel CCL Comparators

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Solution Overview

Problem

Current data processing methods for network communications, particularly in lexical analysis and pattern matching, are computationally expensive due to the need to examine and classify every symbol of information, which is inefficient in high-speed data transmission environments.

Innovation Solution

A system utilizing a complex NFA cell array with a CCL comparator and spin sequence monitor to efficiently match input symbols against character classes, allowing for parallel comparison of sequence CCLs and maintaining a spin count within a predetermined range to initiate sequence matching.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If current data processing methods examine and classify every symbol of information, then classification accuracy is improved, but computational overhead increases

Engineering Contradiction:
Improveclassification accuracyVSAvoidcomputational overhead
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The NFA state machine is divided into multiple cells, each handling specific character class comparisons. The CCL comparator is segmented into multiple comparison units that operate in parallel, allowing the system to process different parts of the pattern simultaneously rather than sequentially examining every symbol.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a parallel comparison dimension by implementing multiple CCL comparators that operate simultaneously on different character classes. This transforms the traditional sequential single-dimension processing into a multi-dimensional parallel processing architecture, increasing throughput without sacrificing accuracy.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Device complexity

If sequential CCL comparison is performed, then computational overhead is reduced, but processing speed decreases

Engineering Contradiction:
Improvecomputational overheadVSAvoidprocessing speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The system pre-configures the NFA cell array with pattern information and pre-loads character class definitions into the CCL comparators before processing begins. This preliminary preparation allows the parallel comparison units to immediately begin processing incoming data without sequential setup delays, achieving both low overhead and high speed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The parallel CCL comparators continuously process incoming symbols without interruption or sequential pauses. Multiple comparisons occur simultaneously and continuously as data flows through the system, eliminating the idle periods and sequential bottlenecks that would reduce processing speed.

Inventive Principle:
Principle #20Continuity of useful action

3Speed

If parallel CCL comparison is implemented, then processing speed is improved, but device complexity increases

Engineering Contradiction:
Improveprocessing speedVSAvoiddevice complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

Each NFA cell and CCL comparator is designed as a universal, reconfigurable unit that can handle multiple character classes and pattern types. This multi-functionality allows the same hardware structure to be reused across different comparison tasks, reducing overall device complexity despite the parallel architecture. The cells can be dynamically configured to match different patterns without requiring dedicated hardware for each case.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10133982B2Complex NFA state matching method that matches input symbols against character classes (CCLS), and compares sequence CCLS in parallel
Publication Date: 2018.11.20 INTEL CORP
  • US10133982B2 patent drawing
  • US10133982B2 patent drawing
  • US10133982B2 patent drawing

AI summary

Disclosed is a method and system for matching a complex NFA state comprising a spinner followed by a character class sequence which may be represented by the general regular expression form [S] {N,M}[A0][A1] . . . [Ak−1]. An input transition activates the spinner and the spin count increments with successive matches of the spin class [S]. When the spin count is between N and M, sequence matching begins. Several base sequence CCLs are compared in parallel with a corresponding window of input symbols. If all match, a signal enters a delay line until the end of the base sequence. When the signal exits the delay line, extended sequence CCLs are accessed from a table sequentially and compared with successive input symbols. After the final extension CCL matches, an output transition is signaled. For short sequences, unused base sequence CCLs may be configured with look-ahead classes.