NFC Amplifier Circuit Architecture for Single-Antenna Dual-Mode Power

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Solution Overview

Problem

Existing NFC devices require bulky components like baluns and switches to manage different power needs between card and reader modes, which complicates the design and increases size, especially when using a single antenna for both modes.

Innovation Solution

A novel NFC controller architecture with two groups of amplifiers, each with different power outputs, allows for flexible interconnection to accommodate either differential or single-ended antennas, eliminating the need for mode-switching transformers and reducing bulk by enabling power optimization for both card and reader modes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If a single antenna is used for both card mode and reader mode, then device size is reduced, but the device requires bulky components like baluns and switches to manage different power needs

Engineering Contradiction:
Improvedevice sizeVSAvoidcircuit complexity
Core Design Contradiction:
Volume of moving objectVSDevice complexity

Solution Approach 1:

The amplifier group is segmented into multiple subgroups, where each subgroup can be independently activated. This allows the circuit to provide different power levels for card mode and reader mode without requiring external switches or baluns, thus reducing device size while managing complexity through internal segmentation

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The amplification circuit is designed to serve multiple functions: it can operate in high-power mode for reader mode and low-power mode for card mode using the same antenna and amplifier group. This multi-functionality eliminates the need for separate circuits or mode-switching components, reducing both size and complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Use of energy by moving object

If mode-switching transformers are used to manage power needs, then power optimization is achieved, but device size and complexity increase

Engineering Contradiction:
Improvepower optimizationVSAvoiddevice size
Core Design Contradiction:
Use of energy by moving objectVSVolume of moving object

Solution Approach 1:

The patent extracts the power optimization function from external mode-switching transformers and integrates it directly into the amplifier group through selective activation of subgroups. This eliminates the need for separate transformers while maintaining power optimization capabilities

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The power optimization function is merged with the amplification circuit by incorporating the subgroup activation mechanism within the same integrated circuit. This combining of functions eliminates additional components like transformers and switches, reducing device size while maintaining power optimization

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If additional antenna switches are added to manage different modes, then mode switching capability is improved, but device complexity and size increase

Engineering Contradiction:
Improvemode switching capabilityVSAvoidcircuit complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The amplifier group performs self-service by internally managing mode switching through selective activation of its subgroups. This eliminates the need for external antenna switches, as the amplification circuit itself adapts to different modes by activating appropriate subgroups, thus reducing complexity while maintaining versatility

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10644739B2Amplification circuit, controller, and transceiver circuit
Publication Date: 2020.05.05 STMICROELECTRONICS (ROUSSET) SAS
  • US10644739B2 patent drawing
  • US10644739B2 patent drawing
  • US10644739B2 patent drawing

AI summary

An amplification circuit includes a first group of amplifiers including N first amplifiers, a first terminal coupled to each output of the N first amplifiers, and a second group of amplifiers including N second amplifiers. Each of the N first amplifiers and each of the N second amplifiers includes an output. The second group of amplifiers is divided into a first subassembly of amplifiers and a second subassembly of amplifiers. The first subassembly includes M second amplifiers of the second group and the second subassembly includes N−M remaining second amplifiers of the second group. The amplification circuit further includes a second terminal and a third terminal. The second terminal is coupled to each output of the M second amplifiers and the third terminal is coupled to each output of the N−M second remaining amplifiers.