NFET-PFET Offset Screening via Ring Oscillator Frequency

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Solution Overview

Problem

As CMOS technology advances and feature sizes shrink to 90 nm and below, across-chip variations in transistor channel length significantly affect shipped product quality level (SPQL) exposure, making it challenging to effectively screen and control the performance offset between p-type (PFETs) and n-type (NFETs) field effect transistors using conventional statistical analyses and saturation current measurements.

Innovation Solution

The method involves determining frequencies of ring oscillator designs with all transistors being either PFETs or NFETs, using these frequencies to establish test screening limits, and incorporating test points to measure and compare the frequencies of these oscillators in integrated circuits to determine their shipping eligibility, thereby reducing SPQL exposure by defining additional screening boundaries based on frequency measurements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional statistical analyses and saturation current measurements are used to screen PFET-to-NFET performance offsets, then the screening process is simple and low-cost, but the screening precision is insufficient due to across-chip variations in transistor channel length at 90 nm and below

Engineering Contradiction:
Improvescreening precisionVSAvoidscreening process complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces ring oscillators as intermediary test structures that convert difficult-to-measure transistor performance parameters into easily measurable frequency signals. The ring oscillators serve as mediators between the transistors under test and the measurement equipment, enabling precise screening of PFET-to-NFET performance offsets through frequency comparisons rather than direct saturation current measurements

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces direct electrical measurement of saturation current with a frequency-based measurement system. By substituting the measurement approach from direct electrical parameter measurement to frequency domain measurement through oscillating circuits, the system achieves higher precision in detecting performance offsets while simplifying the measurement process

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If across-chip variations in transistor channel length are not accounted for, then the manufacturing process remains simple, but the shipped product quality level (SPQL) exposure increases

Engineering Contradiction:
Improveshipped product quality levelVSAvoidtransistor channel length control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent implements preliminary screening of across-chip variations by measuring ring oscillator frequencies before final product shipment. This preliminary action identifies and flags devices with significant channel length variations early in the manufacturing process, allowing for quality control decisions to be made before products are shipped, thereby reducing SPQL exposure

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent establishes a feedback mechanism where ring oscillator frequency measurements provide information about actual transistor performance and channel length variations. This feedback is used to adjust screening criteria and make informed decisions about product quality, creating a closed-loop quality control system that responds to actual device variations

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8196088B2Method and structure for screening NFET-to-PFET device performance offsets within a CMOS process
Publication Date: 2012.06.05 MARVELL ASIA PTE LTD
  • US8196088B2 patent drawing
  • US8196088B2 patent drawing
  • US8196088B2 patent drawing

AI summary

A method of screening on-chip variation in NFET-to-PFET device performance for as-manufactured integrated circuits (ICs) made using a CMOS process. The method includes defining an acceptable frequency- or period-based NFET-to-PFET device performance envelope by simulating a pair of ring oscillators, one of which contains only NFET transistors and the other of which contains only PFET transistors. The ring oscillators are then fabricated into each as-manufactured ICs. At screening time, the ring oscillators in each fabricated IC are tested to measure their frequencies (periods). These frequencies (periods) are then compared to the performance envelope to determine whether the NFET-to-PFET device performance of the corresponding IC is acceptable or not.