Network Flow Processor Cache Line Architecture
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Solution Overview
Problem
Existing network flow processors face inefficiencies in dynamic management of flow cache operations, including handling of hash collisions and lock management, which limits simultaneous processing and updates of flow statistics.
Innovation Solution
The implementation of a network device with a network flow processor integrated circuit and external bulk memory, utilizing cache lines with lock/hash entry slots that include exclusive and shared lock values, and an automatic hash entry adding feature, allowing for simultaneous processing of packets and dynamic addition/deletion of flow keys without erroneous statistics, and reducing memory access through storing lock status information with entry hash values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional flow cache operations are used with separate lock management and head pointers, then flow statistics can be maintained, but processing speed is limited and memory access efficiency deteriorates
Solution Approach 1:
The patent combines lock status information and entry hash values into the same cache line, eliminating separate lock management structures. This merging allows threads to access both lock status and hash entries in a single memory operation, dramatically reducing memory access time and improving packet processing throughput.
Solution Approach 2:
The patent extracts explicit head pointers from the data structure by using implicit head pointers derived from cache line addresses. This extraction simplifies the data structure and eliminates the need for separate pointer storage, reducing memory overhead and improving access efficiency.
2Reliability
If explicit head pointers are used to manage linked lists of keys, then key traversal is enabled, but memory efficiency deteriorates and cache line misses increase
Solution Approach 1:
The patent removes explicit head pointers from the linked list structure and replaces them with implicit head pointers that can be derived from the cache line address itself. This extraction eliminates redundant pointer storage, improving memory efficiency while maintaining reliable key traversal through the linked list.
3Reliability
If separate lock management structures are maintained, then thread synchronization is achieved, but device complexity and memory overhead increase
Solution Approach 1:
The patent merges lock status information directly into the cache line structure alongside entry hash values. This consolidation eliminates separate lock management data structures, reducing device complexity while maintaining reliable thread synchronization through the integrated lock status fields.
4Measurement precision
If multiple cache lines are accessed for lock status and hash entries, then accurate flow statistics are maintained, but processing speed and memory efficiency deteriorate
Solution Approach 1:
The patent combines lock status information and entry hash values into the same cache line structure. This merging enables single-cache-line access for both lock management and hash entry retrieval, eliminating multiple cache line accesses while maintaining accurate flow statistics through the integrated structure.
Data Source
AI summary
The flow cache of a network flow processor (NFP) stores flow lookup information in cache lines. Some cache lines are stored in external bulk memory and others are cached in cache memory on the NFP. A cache line includes several lock/hash entry slots. Each slot can store a CAM entry hash value, associated exclusive lock status, and associated shared lock status. The head of a linked list of keys associated with the first slot is implicitly pointed to. For the other lock/entry slots, the cache line stores a head pointer that explicitly points to the head. Due to this architecture, multiple threads can simultaneously process packets of the same flow, obtain lookup information, and update statistics in a fast and memory-efficient manner. Flow entries can be added and deleted while the flow cache is handling packets without the recording of erroneous statistics and timestamp information.