Ni Plating on BLM Edge for Pb-Free C4 Undercut Control

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Solution Overview

Problem

Pb-free Controlled Collapse Chip Connection (C4) with Ball Limiting Metallurgy (BLM) structures experience chip-level cracking during back-end-of-line (BEOL) processes due to chemical and thermal undercutting, leading to mechanical weakness at the TiW/intermetallic interface, which is exacerbated by different coefficients of thermal expansion between the semiconductor chip and packaging laminate.

Innovation Solution

A BLM structure is formed with a metal seed layer and a barrier metal layer that covers the first circumferential edge but not the second, preventing undercut and reducing tensile stresses during chip-join cool-down, while allowing compressive stress edges to remain uncovered to avoid delamination.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If wet etching is performed on the Cu seed layer to form BLM structures, then the BLM structure is formed with proper adhesion and diffusion barrier properties, but chemical undercut of 1-2 μm occurs at the edges of the C4 solder bump structures

Engineering Contradiction:
Improveadhesion and diffusion barrier propertiesVSAvoidedge precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

A Ni barrier layer is electroplated on the Cu seed layer before wet etching to prevent chemical undercut. This preliminary protective layer is deposited in advance to prevent the harmful chemical reaction between the etchant and Cu seed layer, thereby maintaining edge precision while preserving the necessary adhesion and diffusion barrier properties.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The Ni barrier layer serves as an intermediary between the Cu seed layer and the wet etchant. This intermediate layer prevents direct contact between the etchant and Cu, eliminating the chemical undercut problem while allowing the BLM structure to maintain its adhesion and diffusion barrier functions.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If solder reflow is performed to complete the C4 bump formation, then the solder bump is properly formed and bonded, but thermal undercut of 2-5 μm occurs due to thermal reaction between Sn and exposed Cu

Engineering Contradiction:
Improvesolder bump bondingVSAvoidedge precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The Ni barrier layer is deposited on the Cu seed layer before solder reflow to prevent thermal undercut. This preliminary protective layer prevents the thermal reaction between Sn and Cu during the reflow process, maintaining edge precision while allowing proper solder bump formation and bonding.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The Ni barrier layer acts as an intermediary that prevents direct thermal reaction between Sn in the solder bump and Cu in the seed layer during reflow. This intermediate layer eliminates the harmful thermal undercut while preserving the necessary bonding properties.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If the Cu seed layer is fully exposed to allow good adhesion, then adhesion to passivation layer and bonding pad is improved, but mechanical weakness occurs at the TiW/intermetallic interface due to undercut

Engineering Contradiction:
ImproveadhesionVSAvoidmechanical strength
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The Ni barrier layer is deposited on the Cu seed layer before subsequent processing steps to prevent undercut. This preliminary protective layer maintains the full exposure of the Cu seed layer for good adhesion while preventing mechanical weakness by eliminating the undercut that would create weak interfaces.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The Ni barrier layer serves as a protective intermediary that prevents the formation of weak intermetallic interfaces. By preventing undercut, it maintains the mechanical strength of the structure while allowing the Cu seed layer to remain fully exposed for optimal adhesion properties.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces chip-level cracking by preventing undercut and maintaining the integrity of the Cu seed layer, enhancing the mechanical strength of the BLM structure and minimizing stress-induced damage during thermal expansion.

Implementation Method 1

chemical undercut of 1-2 μm can occur at the edges of the C4 solder bump structures

Methodology Applied
Scientific EffectChemical undercutting: Crevice Corrosion

Implementation Method 2

thermally driven reaction that occurs between the Sn of the solder and any exposed Cu of the Cu seed layer

Methodology Applied
Scientific EffectThermal reaction: Diffusion

Implementation Method 3

thermal undercut can add an additional undercut of 2-5 μm from the edges of the chemically undercut C4 solder bump structure

Methodology Applied
Scientific EffectThermal undercut: Crevice Corrosion

Implementation Method 4

different coefficients of thermal expansion between the semiconductor chip and packaging laminate

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Implementation Method 5

chip-level cracking during back-end-of-line (BEOL) processes

Methodology Applied
Scientific EffectStress-induced damage: Fracture Mechanics

Data Source

PatentUS8476762B2Ni plating of a BLM edge for Pb-free C4 undercut control
Publication Date: 2013.07.02 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8476762B2 patent drawing
  • US8476762B2 patent drawing
  • US8476762B2 patent drawing

AI summary

A structure and a method of manufacturing a Pb-free Controlled Collapse Chip Connection (C4) with a Ball Limiting Metallurgy (BLM) structure for semiconductor chip packaging that reduce chip-level cracking during the Back End of Line (BEOL) processes of chip-join cool-down. An edge of the BLM structure that is subject to tensile stress during chip-join cool down is protected from undercut of a metal seed layer, caused by wet etch of the chip to remove metal layers from the chip's surface and solder reflow, by an electroplated barrier layer, which covers a corresponding edge of the metal seed layer.