NIC Clock Reporting for Scalable Timing Error Analysis
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Solution Overview
Problem
Existing methods for evaluating timing errors in computer network synchronization protocols are cumbersome and not scalable, lacking accuracy and ease of implementation, particularly for high-precision protocols like PTP and NTP.
Innovation Solution
A method involving a network interface controller (NIC) that detects a trigger signal via a pulse-per-second input port, records the internal hardware clock value, and reports it for comparison with another device's time value to determine timing errors, enabling accurate and scalable evaluation of synchronization performance across various network topologies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If existing methods are used to evaluate timing errors, then the evaluation can be performed, but the methods are cumbersome and not scalable
Solution Approach 1:
The patent uses a pulse-per-second signal as a standardized copy/template that can be distributed to multiple NICs simultaneously. This allows the same timing reference to be replicated across the network, enabling scalable evaluation without increasing method complexity. Each NIC receives an identical copy of the trigger signal, allowing parallel timing error measurement across multiple devices.
2Measurement precision
If existing methods are used to evaluate timing errors, then the evaluation can be performed, but the accuracy is insufficient
Solution Approach 1:
The system performs preliminary synchronization by distributing the pulse-per-second trigger signal to all NICs before the actual timing error measurement begins. This pre-synchronization ensures that all devices are operating from a common time reference, thereby improving measurement accuracy while maintaining ease of operation through automated signal distribution.
Solution Approach 2:
The patent replaces manual or complex mechanical timing measurement methods with an electronic pulse-per-second signal system. By using electrical/electronic triggering and digital clock value comparison, the system achieves higher measurement accuracy while simplifying the operational process, as the electronic signal can be automatically generated, distributed, and processed without manual intervention.
3Measurement precision
If internal hardware clock values are recorded and reported, then timing error determination becomes accurate, but the system requires additional reporting and detection mechanisms
Solution Approach 1:
The NIC is designed with multi-functionality, serving both as a network communication device and as a timing error measurement instrument. The same NIC hardware that handles normal network traffic also captures the pulse-per-second trigger signal, records internal clock values, and reports timing data. This universal design improves measurement accuracy without requiring separate dedicated measurement equipment, thereby avoiding additional system complexity.
Data Source
AI summary
A trigger signal provided via a pulse-per-second input port of a network interface controller is detected. In response to the trigger signal, an internal hardware clock value of the network interface controller is recorded. The recorded internal hardware clock value is reported, wherein the reported internal hardware clock value is reported for use in determining a timing error of the network interface controller based at least in part on a comparison with a time value of another device that also received the trigger signal.