NIC Egress Queue Scheduling for Time-Sensitive Packet Shaping
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Solution Overview
Problem
Shaping the transmission of packets for multiple flows at prescribed rates in network applications with parallel and hierarchical traffic shaping topologies is processor-intensive, leading to reduced processor cycles for other applications, and existing methods struggle with compliance to IEEE 802.1Qbv and SMPTE ST 2110-21 standards due to latencies and transmission pausing schemes.
Innovation Solution
Implementing a network interface device with a scheduling egress buffer that prioritizes packet transmission based on time stamps and priority, using arbiters to manage queues and override pause commands, ensuring packets are transmitted within specified time frames while reducing jitter and latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If parallel and hierarchical layers of traffic shaping topologies are used to shape packet transmission for multiple flows at prescribed rates, then transmission timing compliance with IEEE 802.1Qbv and SMPTE ST 2110-21 is improved, but processor intensity increases significantly
Solution Approach 1:
The traffic shaping function is segmented into multiple hierarchical stages (ingress shaping, egress shaping, port-level shaping) that operate in parallel. Each stage handles a subset of flows independently, distributing the processing load across multiple processor cores or hardware modules, thereby reducing the processor intensity for any single component while maintaining overall timing compliance.
Solution Approach 2:
Packet timing parameters and shaping rates are pre-calculated and configured before traffic flow begins. The system performs preliminary classification of packets into time-sensitive and non-time-sensitive categories, and pre-establishes shaping parameters for each flow based on prescribed rates. This preliminary action reduces runtime processor intensity by eliminating the need for complex real-time calculations during packet transmission.
2Manufacturing precision
If processor cycles are utilized for packet scheduling and shaping, then transmission timing control is improved, but processor cycles available for other applications are reduced
Solution Approach 1:
A dedicated network interface controller (NIC) with integrated traffic shaping hardware is introduced as an intermediary between the processor and the network. This intermediary performs packet scheduling and shaping operations in hardware, offloading these processor-intensive tasks from the main CPU. The NIC maintains timing control precision while preserving processor cycles for other applications by executing shaping operations independently through specialized hardware circuits or separate processing cores.
Solution Approach 2:
The system implements self-service mechanisms where the network interface automatically performs packet classification, timing validation, and shaping operations without requiring continuous processor intervention. Once shaping parameters are configured, the NIC autonomously manages packet transmission timing and flow control, reducing the ongoing processor cycle requirement while maintaining precise timing control.
3Adaptability or versatility
If transmission pausing schemes are implemented to control traffic flow, then bandwidth allocation control is improved, but compliance with time-sensitive packet transmission standards deteriorates
Solution Approach 1:
The system implements dynamic pause command handling that adapts based on packet time sensitivity. For time-sensitive packets, the pause command is overridden or adjusted to maintain required transmission timing, while for non-time-sensitive packets, standard pause commands are applied for bandwidth control. This dynamic approach allows the system to maintain both bandwidth allocation control and compliance with time-sensitive transmission standards by selectively applying different pause handling strategies.
Data Source
AI summary
Examples described herein relate to a network interface device. The network interface device can include circuitry to select a packet for transmission from among at least one time-based queue and at least one priority-based queue based on a departure time stamp value associated with the packet and a current time value. The network interface device can include circuitry to cause transmission of the selected packet. The circuitry can select a packet for transmission from the at least one time-based queue based on the current time value and based on the associated departure time stamp value.


