NIC Flow Switching via Hardware-Based MAC Frame Forwarding
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Solution Overview
Problem
Current Network Interface Controllers (NICs) face bottlenecks in packet processing at high bandwidths, leading to saturated PCIe interconnects and processor cache thrashing, especially in virtualized environments with multiple virtual machines sharing the same host, which limits scalability and efficiency in data center servers.
Innovation Solution
Implementing a hardware-based forwarding mechanism that allows Media Access Control (MAC) frames to be forwarded between NIC ports without involving the host processor, using dedicated queues and filter rules to determine forwarding paths, thereby reducing interconnect traffic and processor cycles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional packet processing is used in virtualized environments, then network communication between virtual machines is enabled, but PCIe interconnect saturation and processor cache thrashing occur
Solution Approach 1:
The patent extracts the packet forwarding function from the host processor and PCIe interconnect by implementing a direct queue-to-queue forwarding path within the NIC. This removes the bottlenecking components (host processor involvement and PCIe traffic) from the critical forwarding path, allowing packets to be forwarded between virtual machine queues without saturating the PCIe interconnect or consuming host processor cycles.
Solution Approach 2:
The patent introduces an intermediary forwarding mechanism within the NIC that acts as a mediator between receive queues and transmit queues. This intermediary structure enables direct packet transfer between virtual machines without requiring host processor intervention or PCIe bus transactions, thereby eliminating the harmful effects of interconnect saturation and cache thrashing.
2Adaptability or versatility
If host processor is involved in packet forwarding, then packet processing flexibility is maintained, but CPU utilization increases and scalability is limited
Solution Approach 1:
The patent segments the packet processing function into distinct queue structures within the NIC, separating receive queues from transmit queues and enabling direct forwarding between them. This segmentation allows packet forwarding to occur independently of the host processor, improving scalability while maintaining flexibility through configurable queue mappings and filtering rules.
Solution Approach 2:
The NIC enables self-service packet forwarding by implementing hardware-based queue-to-queue transfer capabilities without host processor involvement. The forwarding engine autonomously processes packets according to configured filtering rules and queue mappings, eliminating the need for CPU intervention and enabling linear scaling with increased network bandwidth.
3Ease of operation
If PCIe interconnect is used for packet transfer, then device communication is enabled, but interconnect saturation occurs at high bandwidths
Solution Approach 1:
The patent changes the dimension of packet transfer by implementing a direct internal path within the NIC that bypasses the PCIe interconnect dimension. By creating a parallel forwarding channel that operates independently of the PCIe bus, the system maintains device communication capability while eliminating interconnect traffic saturation at high bandwidths.
Data Source
AI summary
Methods, apparatus, and systems for implementing in Network Interface Controller (NIC) flow switching. Switching operations are effected via hardware-based forwarding mechanisms in apparatus such as NICs in a manner that does not employ use of computer system processor resources and is transparent to operating systems hosted by such computer systems. The forwarding mechanisms are configured to move or copy Media Access Control (MAC) frame data between receive (Rx) and transmit (Tx) queues associated with different NIC ports that may be on the same NIC or separate NICs. The hardware-based switching operations effect forwarding of MAC frames between NIC ports using memory operations, thus reducing external network traffic, internal interconnect traffic, and processor workload associated with packet processing.