NIC Packet Segmentation With HBM for Parallel Payload Processing

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Solution Overview

Problem

Existing network interface controllers struggle to efficiently access and process various portions of data packets for applications like Deep Packet Inspection (DPI) and Transport Layer Security (TLS) offload due to limited memory buffering capabilities.

Innovation Solution

Employing a high-bandwidth memory (HBM) with a wide data path to buffer segments of data packets, enabling concurrent processing of headers and payload, and using programmable packet parsers for operations such as TLS offload, full protocol stack offload, and deep packet inspection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a traditional network interface controller processes only the first N bytes of data packets, then the device complexity is low and processing is simple, but applications like Deep Packet Inspection and Transport Layer Security offload cannot access other portions of the data packet

Engineering Contradiction:
Improveaccess capability to data packet portionsVSAvoidmemory buffering capability
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The data packet is divided into multiple segments: a first portion containing headers (L3-L1 headers) that can be processed by the streaming pipeline, and a second portion containing the payload that is buffered in high bandwidth memory. This segmentation allows different parts of the packet to be handled differently - headers are processed in the streaming pipeline while payload can be accessed by applications requiring Deep Packet Inspection or TLS offload.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces high bandwidth memory as a new dimension for data storage and access. By adding this memory layer between the streaming pipeline and the applications, the system enables random access to any portion of the data packet without requiring the entire packet to pass through the streaming pipeline, thus solving the access limitation while maintaining processing efficiency.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If the streaming pipeline processes only headers, then processing speed is fast and resource usage is low, but applications needing payload access cannot perform operations on the packet payload

Engineering Contradiction:
Improveprocessing speedVSAvoidapplication functionality
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The data packet processing is segmented into two parallel paths: the streaming pipeline processes headers at high speed without buffering, while the payload is simultaneously buffered in high bandwidth memory for applications requiring Deep Packet Inspection or TLS offload. This segmentation enables both fast header processing and flexible payload access to occur concurrently.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The high bandwidth memory acts as an intermediary between the streaming pipeline and applications requiring payload access. It receives the payload portion of the packet from the streaming pipeline and makes it available for applications like Deep Packet Inspection and TLS offload, enabling these applications to function without slowing down the main processing pipeline.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If large memory is allocated to buffer entire data packets, then applications can access any portion of the packet, but the memory bandwidth and cost increase significantly

Engineering Contradiction:
Improvepacket access capabilityVSAvoidmemory bandwidth
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

Instead of buffering entire data packets uniformly, the patent applies local quality by buffering only the payload portion in high bandwidth memory while allowing headers to flow through the streaming pipeline. This selective buffering approach provides the necessary access capability for applications needing payload inspection while minimizing the memory bandwidth requirements compared to buffering entire packets.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent implements partial action by buffering only the necessary payload portion rather than the entire packet. This partial buffering provides sufficient access capability for Deep Packet Inspection and TLS offload applications without the excessive memory bandwidth consumption that would result from buffering complete packets, thus achieving the required functionality with reduced resource overhead.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12470643B2Method and apparatus to perform operations on multiple segments of a data packet in a network interface controller
Publication Date: 2025.11.11 INTEL CORP
  • US12470643B2 patent drawing
  • US12470643B2 patent drawing
  • US12470643B2 patent drawing

AI summary

A stacked memory such as a high bandwidth memory (HBM) with a wide data path is used by a streaming pipeline in a network interface controller to buffer segments of a data packet to allow the network interface controller to perform operations on the packet payload. The headers and packet payload can be scanned and classified concurrently with the buffered payload parsed in parallel.