Network Interface Controller Offload for PTP Clock Synchronization

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Solution Overview

Problem

The existing Precision Time Protocol (PTP) for clock synchronization in computer networks is processing-intensive, particularly due to the need for user-space applications to generate and manage clock synchronization follow-up messages, which complicates the synchronization process across multiple slave clock devices.

Innovation Solution

The system offloads the generation of clock synchronization follow-up messages to the network interface controller (NIC), allowing it to autonomously process and send these messages, including duplicating the synchronization marker message, performing packet loopbacks, and inserting timestamps into metadata, thereby reducing the processing burden on user-space applications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Extent of automation

If user-space applications generate and manage clock synchronization follow-up messages, then the synchronization protocol can be implemented, but the processing intensity and complexity increase significantly

Engineering Contradiction:
Improveautomation of follow-up message generationVSAvoidprocessing complexity of user-space application
Core Design Contradiction:
Extent of automationVSDevice complexity

Solution Approach 1:

The patent extracts the follow-up message generation functionality from the user-space application and relocates it to the network interface controller (NIC). The NIC autonomously generates follow-up messages based on received marker messages, eliminating the need for user-space applications to manually create and manage these messages. This extraction reduces user-space processing complexity while maintaining synchronization functionality.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The network interface controller is designed to self-service by autonomously generating follow-up messages without requiring intervention from user-space applications. The NIC uses its own internal resources and processing capabilities to create, timestamp, and transmit follow-up messages, making the system self-sufficient in this critical synchronization function.

Inventive Principle:
Principle #25Self-service

2Measurement precision

If user-space applications poll the kernel space driver for measured time, then the timestamp can be obtained, but the processing burden and latency increase

Engineering Contradiction:
Improvetimestamp accuracyVSAvoidpolling latency
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The network interface controller performs preliminary actions by autonomously generating and timestamping follow-up messages immediately upon receiving marker messages. This eliminates the need for subsequent polling operations, as the timestamping is completed in advance within the NIC itself, reducing latency and processing burden.

Inventive Principle:
Principle #10Preliminary action

3Loss of information

If the NIC returns measured time to the kernel space driver, then the timestamp is available, but the processing steps and potential failure points increase

Engineering Contradiction:
Improvetimestamp information availabilityVSAvoidnumber of processing steps
Core Design Contradiction:
Loss of informationVSDevice complexity

Solution Approach 1:

The patent merges multiple processing steps into a single integrated operation within the network interface controller. The NIC combines receiving the marker message, measuring the timestamp, generating the follow-up message, and transmitting it all within its own processing pipeline. This consolidation eliminates the need for separate polling and time-return steps, reducing the number of processing steps and potential failure points.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12255734B2Clock synchronization NIC offload
Publication Date: 2025.03.18 MELLANOX TECHNOLOGIES LTD(IL)
  • US12255734B2 patent drawing
  • US12255734B2 patent drawing
  • US12255734B2 patent drawing

AI summary

In one embodiment, a system includes a network interface controller including a device interface to connect to a processing device and receive a time synchronization marker message from an application running on the processing device, a network interface to send packets over a network, and packet processing circuitry to process the time synchronization marker message for sending via the network interface over the network to a slave clock device, generate a time synchronization follow-up message including a timestamp indicative of when the synchronization marker message egressed the network interface, and process the time synchronization follow-up message for sending via the network interface over the network to the slave clock device.