NIC Scheduler Offloads CPU Task Distribution
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Solution Overview
Problem
In distributed computing systems, the central processing unit (CPU) is burdened with scheduling tasks, leading to processing slowdowns and inefficiencies, as it handles scheduling operations that could be performed by other components, thereby increasing task launch latency and reducing system efficiency.
Innovation Solution
Implementing a network interface controller (NIC) with a scheduler that receives and schedules processing tasks based on policy data, freeing the CPU from scheduling duties and using techniques like RDMA for task transmission, allowing direct storage in memory without CPU intervention, and employing policies such as queue occupancy, priority, and data locality to determine task assignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the CPU performs scheduling operations for processing tasks, then the scheduling can be centralized and controlled, but the CPU processing load increases and task launch latency increases
Solution Approach 1:
The patent extracts the scheduling function from the CPU and relocates it to the network interface controller (NIC). The NIC includes a scheduler that receives processing tasks from the network and schedules them for execution on computing elements without CPU intervention, thereby reducing CPU processing load while maintaining centralized scheduling control through policy-based management.
Solution Approach 2:
The patent introduces the NIC as an intermediary component between the network and the CPU/computing elements. The NIC's scheduler acts as a mediator that handles task scheduling operations, preventing the CPU from being burdened with scheduling duties while ensuring tasks are properly distributed to computing elements based on scheduling policies.
2Reliability
If the CPU handles all scheduling operations, then scheduling decisions can be made with full system visibility, but task launch latency increases
Solution Approach 1:
The patent implements preliminary action by having the NIC scheduler receive and pre-process incoming tasks from the network before they reach the CPU. The scheduler maintains task queues and performs scheduling decisions in advance, so when tasks need to be executed, they are already prepared and queued, reducing the time from task arrival to execution launch.
Solution Approach 2:
The NIC scheduler operates autonomously to handle scheduling operations without requiring CPU intervention for each task. It independently receives tasks from the network, makes scheduling decisions based on policies, and directs tasks to appropriate computing elements, enabling the system to handle task scheduling self-service and reducing task launch latency.
3Productivity
If the NIC scheduler uses policy data for task assignment, then resource allocation is optimized, but the complexity of scheduling management increases
Solution Approach 1:
The patent manages scheduling complexity by parameterizing the scheduling behavior through policy data. Instead of implementing complex decision logic directly in the NIC scheduler, the system uses configurable policy parameters that define scheduling behavior. This allows optimized resource allocation through policy-based control while keeping the actual scheduler implementation relatively simple and manageable.
Data Source
AI summary
Techniques for scheduling processing tasks in a device having multiple computing elements are disclosed. A network interface controller of the device receives processing tasks, for execution on the computing elements, from a network that is external to the device. The network interface controller schedules the tasks for execution on the computing devices based on policy data available to the network interface controller. A scheduler within the network interface controller, which can be implemented as a standalone processing unit (such as a microcontroller, a programmable processing core, or an application specific integrated circuit), performs such scheduling, thereby freeing the central processing unit of the device from the burden of performing scheduling operations. The scheduler schedules the tasks according to any technically feasible scheduling technique.


