Nickel-Plated Semiconductor Chip Bonding Against Electromigration

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Solution Overview

Problem

Existing semiconductor devices face challenges with electromigration, which leads to increased thermal resistance and wiring resistance due to the formation of tin-copper alloy layers and voids in solder layers and alloy layers.

Innovation Solution

The implementation of nickel plating layers on the semiconductor chip-side surfaces of lead frames and wiring layers helps suppress electromigration by preventing the movement of copper atoms in solder layers, thereby reducing the expansion of tin-copper alloy layers and void production.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If solder layers are used to bond semiconductor chips to lead frames, then bonding strength is improved, but tin-copper alloy layer formation increases thermal resistance

Engineering Contradiction:
Improvebonding strengthVSAvoidthermal resistance
Core Design Contradiction:
StrengthVSTemperature

Solution Approach 1:

The nickel plating layer serves as an intermediary that prevents direct contact and alloying between copper and tin. By blocking the diffusion interface, the nickel layer prevents the formation of thick tin-copper alloy layers that would increase thermal resistance, while still allowing the solder to bond to the nickel surface.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the material parameter of the plating layer from copper (in conventional designs) to nickel. This parameter change fundamentally alters the diffusion behavior at the interface, preventing copper-tin alloy formation and maintaining lower thermal resistance in the bonding structure.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If nickel plating layers are added to suppress electromigration, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improveelectromigration resistanceVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent modifies a single material parameter (the plating layer material) from conventional copper or no plating to nickel. This simple parameter change provides electromigration protection without requiring complex structural modifications, multi-layer plating systems, or process changes. The solution maintains the basic two-layer structure (plating + solder) while improving reliability.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively prevents increases in thermal resistance and wiring resistance, enhancing the long-term reliability of semiconductor devices by mitigating the effects of electromigration.

Implementation Method 1

electromigration, which leads to increased thermal resistance and wiring resistance due to the formation of tin-copper alloy layers and voids in solder layers

Methodology Applied
Scientific EffectElectromigration:

Implementation Method 2

a first solder layer that contains tin and bonds the upper surface of the semiconductor chip to the first plating layer

Methodology Applied
Scientific EffectSoldering: Soldering

Data Source

PatentUS20250038146A1Semiconductor device
Publication Date: 2025.01.30 FUJI ELECTRIC CO LTD
  • US20250038146A1 patent drawing
  • US20250038146A1 patent drawing
  • US20250038146A1 patent drawing

AI summary

A semiconductor device includes: a semiconductor chip including upper and lower surfaces and transistor regions and diode regions being arranged alternately with one another along the upper and lower surfaces; a lead frame containing copper disposed on the upper surface of the semiconductor chip; a plating layer containing nickel disposed on a semiconductor chip-side surface of the lead frame; a solder layer that contains tin and bonds the upper surface of the semiconductor chip to the plating layer; an insulated circuit board that is disposed on the lower surface of the semiconductor chip and has a wiring layer containing copper disposed on a semiconductor chip-side surface thereof; a plating layer containing nickel that is disposed on a semiconductor chip-side surface of the wiring layer; and a solder layer containing tin that bonds the lower surface of the semiconductor chip to the plating layer.