Nickel Silicide Source Drain Schottky Barrier Reduction

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Solution Overview

Problem

Conventional MOSFET devices struggle to effectively reduce the Schottky barrier height between metal silicide and silicon, limiting the reduction of source/drain resistance and driving capability, which affects the overall electric properties of semiconductor devices.

Innovation Solution

A method involving the formation of a gate stacked structure, deposition of a Nickel-based metal layer, first annealing to create a Ni-rich phase, ion implantation into the Ni-rich phase, and a second annealing to transform it into a low-resistance Nickel-based metal silicide source/drain, forming a segregation region of doping ions at the interface to reduce the Schottky barrier height.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If Nickel-based metal silicide is used as source/drain material to reduce source/drain resistance, then contact resistance is reduced, but the Schottky barrier height between metal silicide and silicon channel remains relatively large (0.7 eV), limiting driving current

Engineering Contradiction:
Improvecontact resistanceVSAvoiddriving current
Core Design Contradiction:
ReliabilityVSPower

Solution Approach 1:

The patent applies local quality by creating a segregation region with high concentration of doping ions specifically at the interface between the metal silicide source/drain and the silicon channel. This localized doping region reduces the Schottky barrier height at the critical contact interface without affecting other regions of the device, thereby improving driving current while maintaining low contact resistance.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the chemical and electrical parameters at the metal-silicon interface by introducing doping ions (such as phosphorus or arsenic for nMOS, or boron for pMOS) into the segregation region. This parameter change modifies the Schottky barrier height from 0.7 eV to a lower value, enabling higher driving current while preserving the low contact resistance property of the metal silicide.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If device size is continuously downsized to improve integration, then device density increases, but source/drain resistance does not proportionally reduce and contact resistance increases approximately by being squared

Engineering Contradiction:
Improvedevice densityVSAvoidcontact resistance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent addresses the contact resistance increase in downsized devices by creating a localized segregation region with high doping ion concentration at the metal-silicon interface. This local enhancement of electrical properties compensates for the scaling-induced resistance increase, allowing devices to be downsized while maintaining acceptable contact resistance levels.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent performs preliminary doping ion implantation into the metal silicide source/drain before the final annealing step that forms the segregation region. This preliminary action ensures that doping ions are positioned in the metal silicide matrix before the segregation process, enabling the formation of a highly doped interface region that pre-compensates for the contact resistance issues arising from device downsizing.

Inventive Principle:
Principle #10Preliminary action

3Power

If doping ions are implanted into metal silicide source/drain and annealed to form segregation region, then Schottky barrier height is reduced, but the process requires additional manufacturing steps

Engineering Contradiction:
Improvedriving currentVSAvoidmanufacturing process
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The patent merges the doping ion implantation step with the existing SALICIDE process sequence. The doping ions are implanted into the metal layer before the silicide formation annealing, combining two functions (doping and silicide formation) into a integrated process flow. This reduces the overall manufacturing complexity compared to separate doping and silicide formation steps.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent performs doping ion implantation as a preliminary action before the silicide formation annealing step. By implanting ions into the metal layer before it reacts with silicon to form silicide, the process leverages the subsequent annealing step to simultaneously form both the silicide structure and the doping segregation region, thereby reducing the total number of manufacturing steps required.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method improves the solid solubility of doping ions and activates them to significantly reduce the Schottky barrier height, enhancing the driving capability of the semiconductor device.

Implementation Method 1

performing a second annealing so that the rich-Ni phase metal silicide is transformed into a Nickel-based metal silicide source/drain

Methodology Applied
Scientific EffectAnnealing: Annealing

Implementation Method 2

the rich-Ni phase metal silicide is transformed into a low-resistance Nickel-based metal silicide source/drain

Methodology Applied
Scientific EffectPhase transformation: Phase Change

Implementation Method 3

performing an ion implantation by implanting doping ions into the Ni-rich phase of metal silicide

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 4

performing a first annealing so that the silicon in the substrate reacts with the Nickel-based metal layer to form a Ni-rich phase of metal silicide

Methodology Applied
Scientific EffectSolid-state reaction: Chemical Bonding

Data Source

PatentUS8987127B2Method for manufacturing semiconductor device
Publication Date: 2015.03.24 INST OF MICROELECTRONICS CHINESE ACAD OF SCI LTD
  • US8987127B2 patent drawing
  • US8987127B2 patent drawing
  • US8987127B2 patent drawing

AI summary

The present invention discloses a method for manufacturing a semiconductor device, comprising: forming a gate stacked structure on a silicic substrate; depositing a Nickel-based metal layer on the substrate and the gate stacked structure; performing a first annealing so that the silicon in the substrate reacts with the Nickel-based metal layer to form a Ni-rich phase of metal silicide; performing an ion implantation by implanting doping ions into the Ni-rich phase of metal silicide; performing a second annealing so that the Ni-rich phase of metal to silicide is transformed into a Nickel-based metal silicide source/drain, and meanwhile, forming a segregation region of the doping ions at an interface between the Nickel-based metal silicide source/drain and the substrate. The method for manufacturing the semiconductor device according to the present invention performs the annealing after implanting the doping ions into the Ni-rich phase of metal silicide, thereby improving the solid solubility of the doping ions and forming a segregation region of highly concentrated doping ions, thus the SBH between the Nickel-based metal silicide and the silicon channel is effectively reduced, and the driving capability of the device is improved.