Nickel Silicide Transistor for Memory Peripheral Circuit Integration
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Solution Overview
Problem
Current memory structures require significant energy and time to transfer data between processors and memories due to the separation of these components on different chips, necessitating improved transistor performance for integration on the same chip.
Innovation Solution
A memory structure with a transistor in the peripheral circuit region featuring nickel silicide layers on doped regions, which reduces resistance and increases saturation current, enhancing electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If memory and processor are integrated on the same chip, then data transfer efficiency is improved, but transistor performance in peripheral circuit region must be enhanced to achieve effective integration
Solution Approach 1:
The patent applies local quality by forming nickel silicide layers specifically in the peripheral circuit region where transistors are located, while the memory cell region maintains its original structure. This localized modification enhances transistor performance in the peripheral region without affecting the memory cell structure, thereby improving data transfer efficiency while maintaining reliable memory storage functionality.
2Reliability
If nickel silicide layers are formed on doped regions, then resistance is reduced and saturation current is increased, but manufacturing process complexity increases
Solution Approach 1:
The patent implements preliminary action by forming the nickel silicide layers on the doped regions before subsequent processing steps. The nickel silicide layers are formed as a self-aligned structure that prevents unwanted silicide formation in other regions, and the process includes preliminary nickel deposition followed by silicidation treatment, which reduces resistance and increases saturation current while maintaining controllable manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The improved transistor performance in the memory structure leads to better electrical performance and efficient data processing by reducing resistance and increasing saturation current, thus addressing the energy and time constraints of data transfer.
Implementation Method 1
The first nickel silicide layer is located on an entire top surface of the first doped region, and the second nickel silicide layer is located on an entire top surface of the second doped region
Data Source
AI summary
A memory structure including a substrate, a memory cell, and a transistor is provided. The substrate includes a memory cell region and a peripheral circuit region. The memory cell is located in the memory cell region. The transistor is located in the peripheral circuit region. The transistor includes a gate, a first doped region, a second doped region, a first nickel silicide layer, and a second nickel silicide layer. The gate is located on the substrate and is insulated from the substrate. The first doped region and the second doped region are located in the substrate on two sides of the gate. The first nickel silicide layer is located on an entire top surface of the first doped region, and the second nickel silicide layer is located on an entire top surface of the second doped region.