Niobium-Based Silicide Layer for Transistor Source/Drain Regions
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Solution Overview
Problem
In the microelectronics industry, there is a challenge in reducing the two-dimensional area occupied by device components while ensuring reliable operation of transistors, as materials that improve performance for one type of transistor can negatively affect others, and varying materials based on transistor polarity increases the number of masks and intermediate steps needed.
Innovation Solution
The use of a niobium-based silicide layer on source and drain regions of transistors, extending across the entire width of these regions, allows for reliable operation and reduces the need for multiple masks by forming the silicide layer on the entire surface of the source and drain regions, differing from conventional processes that limit silicide formation to the contact area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If materials are varied based on transistor polarity to improve performance, then transistor operation is improved, but the number of masks and intermediate steps increases
Solution Approach 1:
The patent applies universality by using a single niobium-based silicide material that serves multiple transistor types (both PMOS and NMOS) regardless of polarity. This replaces the conventional approach of using different materials for different transistor polarities, thereby maintaining reliable operation while reducing the number of masks and intermediate steps required in the fabrication process
2Ease of manufacture
If silicide formation is limited to contact area only, then manufacturing complexity is reduced, but device performance and reliability are compromised
Solution Approach 1:
The patent applies local quality by forming the niobium-based silicide layer selectively on the source and drain regions of the transistors, extending across substantially the entire width of these regions. This localized application provides enhanced performance and reliability at critical areas (source/drain contacts) while maintaining manufacturing feasibility, bridging the gap between limited contact-area silicide and full-coverage approaches
3Area of moving object
If device size is reduced to increase density, then chip capacity increases, but material selection becomes more challenging to ensure reliable operation
Solution Approach 1:
The patent applies parameter changes by utilizing niobium-based silicide material with specific physical and electrical properties that enable reliable transistor operation at reduced dimensions. The niobium-based silicide provides appropriate contact resistance, mechanical strength, and thermal stability parameters that are critical for miniaturized devices, allowing increased device density while maintaining reliable operation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables increased device density, improved performance, and reduced power consumption by ensuring reliable operation of transistors while minimizing the complexity of manufacturing processes, allowing for more efficient integration of multiple transistor types on a single chip.
Implementation Method 1
converting the niobium-based layer into a niobium-based silicide layer on the S/D region
Data Source
AI summary
Embodiments of the disclosure provide an integrated circuit (IC) structure with a niobium-based silicide layer. An IC structure according to the disclosure includes a transistor on a substrate, the transistor including a gate structure above the substrate and a source/drain (S/D) region on the substrate adjacent the gate structure. A niobium-based silicide layer is on at least an upper surface the S/D region of the transistor, and extends across substantially an entire width of the S/D region. An S/D contact to the S/D region is in contact with the niobium-based silicide layer.


